Searched refs:IMX5_CLK_LDB_DI0_DIV (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx5-clock.h96 #define IMX5_CLK_LDB_DI0_DIV 84 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx51-imx53.c504 clk[IMX5_CLK_LDB_DI0_DIV] = imx_clk_divider_flags("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1, 0); mx53_clocks_init()

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