Searched refs:IMX5_CLK_IPU_DI0_GATE (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx5-clock.h122 #define IMX5_CLK_IPU_DI0_GATE 110 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx51-imx53.c238 clk[IMX5_CLK_IPU_DI0_GATE] = imx_clk_gate2("ipu_di0_gate", "ipu_di0_sel", MXC_CCM_CCGR6, 10); mx5_clocks_common_init()

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