Searched refs:IMX27_CLK_UART5_IPG_GATE (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx27-clock.h90 #define IMX27_CLK_UART5_IPG_GATE 77 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx27.c149 clk[IMX27_CLK_UART5_IPG_GATE] = imx_clk_gate("uart5_ipg_gate", "ipg", CCM_PCCR1, 27); _mx27_clocks_init()
178 clk_register_clkdev(clk[IMX27_CLK_UART5_IPG_GATE], "ipg", "imx21-uart.4"); mx27_clocks_init()

Completed in 66 milliseconds