Searched refs:ICP_QAT_UCLO_MAX_CTX (Results 1 – 3 of 3) sorted by relevance
52 #define ICP_QAT_UCLO_MAX_CTX 8 macro53 #define ICP_QAT_UCLO_MAX_UIMAGE (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX)129 struct icp_qat_uclo_page *cur_page[ICP_QAT_UCLO_MAX_CTX];132 unsigned int new_uaddr[ICP_QAT_UCLO_MAX_CTX];138 struct icp_qat_uclo_aeslice ae_slices[ICP_QAT_UCLO_MAX_CTX];
332 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_wr_indr_csr()361 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_put_sig_event()377 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_put_wakeup_event()1298 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_gpr()1333 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_wr_xfer()1368 } while (ctx_mask && (ctx++ < ICP_QAT_UCLO_MAX_CTX)); in qat_hal_init_rd_xfer()1383 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) { in qat_hal_init_nn()
812 ICP_QAT_UCLO_MAX_CTX) in qat_uclo_init_reg_sym()898 ICP_QAT_UCLO_MAX_CTX); s++) { in qat_uclo_set_ae_mode()972 ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX); in qat_uclo_parse_uof_obj()1132 if (ICP_QAT_CTX_MODE(image->ae_mode) == ICP_QAT_UCLO_MAX_CTX) in qat_uclo_wr_uimage_page()1155 for (ctx = 0; ctx < ICP_QAT_UCLO_MAX_CTX; ctx++) in qat_uclo_wr_uimage_page()