Searched refs:ICMR (Results 1 - 8 of 8) sorted by relevance

/linux-4.1.27/arch/arm/mach-sa1100/
H A Dirq.c35 ICMR &= ~BIT(d->hwirq); sa1100_mask_irq()
40 ICMR |= BIT(d->hwirq); sa1100_unmask_irq()
98 st->icmr = ICMR; sa1100irq_suspend()
105 ICMR &= ~(IC_GPIO11_27|IC_GPIO10|IC_GPIO9|IC_GPIO8|IC_GPIO7| sa1100irq_suspend()
120 ICMR = st->icmr; sa1100irq_resume()
144 icmr = (ICMR); sa1100_handle_irq()
160 ICMR = 0; sa1100_init_irq()
H A Dpm.c93 ICMR = 0; sa11x0_pm_enter()
/linux-4.1.27/arch/arm/mach-pxa/
H A Dirq.c32 #define ICMR (0x004) macro
71 uint32_t icmr = __raw_readl(base + ICMR); pxa_mask_irq()
74 __raw_writel(icmr, base + ICMR); pxa_mask_irq()
81 uint32_t icmr = __raw_readl(base + ICMR); pxa_unmask_irq()
84 __raw_writel(icmr, base + ICMR); pxa_unmask_irq()
100 icmr = __raw_readl(pxa_irq_base + ICMR); icip_handle_irq()
163 __raw_writel(0, base + ICMR); /* disable all IRQs */ pxa_init_irq_common()
192 saved_icmr[i] = __raw_readl(base + ICMR); pxa_irq_suspend()
193 __raw_writel(0, base + ICMR); pxa_irq_suspend()
211 __raw_writel(saved_icmr[i], base + ICMR); pxa_irq_resume()
/linux-4.1.27/arch/arm/mach-sa1100/include/mach/
H A Dmtd-xip.h20 #define xip_irqpending() (ICIP & ICMR)
H A DSA-1100.h1228 * ICMR Interrupt Controller (IC) Mask Register (read/write).
1244 #define ICMR __REG(0x90050004) /* IC Mask Reg. */ macro
1295 /* (ICMR ignored) */
1297 /* enable (ICMR used) */
/linux-4.1.27/arch/arm/mach-pxa/include/mach/
H A Dmtd-xip.h20 #define xip_irqpending() (ICIP & ICMR)
/linux-4.1.27/arch/mips/include/asm/sn/sn0/
H A Dhubio.h348 * ICMR register fields
/linux-4.1.27/arch/ia64/include/asm/sn/
H A Dshubio.h2348 * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
2366 * spurious message captured by II. Valid when the SP_MSG bit in ICMR *
2383 * the SP_MSG bit in the ICMR register is set. *
3046 * ICMR register fields

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