Searched refs:HSSR1_TBY (Results 1 – 2 of 2) sorted by relevance
355 while (!(Ser2HSSR0 & HSSR0_TUR) || Ser2HSSR1 & HSSR1_TBY); in sa1100_irda_firtxdma_irq()
583 #define HSSR1_TBY 0x00000002 /* Transmitter BusY (read) */ macro