Searched refs:GCC_BLSP1_QUP5_BCR (Results 1 - 21 of 21) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/include/dt-bindings/reset/
H A Dqcom,gcc-msm8916.h24 #define GCC_BLSP1_QUP5_BCR 7 macro
H A Dqcom,gcc-msm8974.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
H A Dqcom,gcc-apq8084.h42 #define GCC_BLSP1_QUP5_BCR 25 macro
/linux-4.1.27/drivers/clk/qcom/
H A Dgcc-msm8916.c2714 [GCC_BLSP1_QUP5_BCR] = { 0x06018 },
H A Dgcc-msm8974.c2609 [GCC_BLSP1_QUP5_BCR] = { 0x0840 },
H A Dgcc-apq8084.c3476 [GCC_BLSP1_QUP5_BCR] = { 0x0840 },

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