Searched refs:FPU (Results 1 - 200 of 262) sorted by relevance

12

/linux-4.1.27/arch/alpha/math-emu/
H A DMakefile2 # Makefile for the FPU instruction emulation.
/linux-4.1.27/arch/sparc/kernel/
H A Dcpu.c59 #define FPU(ver, _name) \ macro
74 FPU(0, "Fujitsu MB86910 or Weitek WTL1164/5"),
75 FPU(1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"),
76 FPU(2, "LSI Logic L64802 or Texas Instruments ACT8847"),
78 FPU(3, "Weitek WTL3170/2"),
80 FPU(4, "Lsi Logic/Meiko L64804 or compatible"),
81 FPU(-1, NULL)
98 FPU(0, "ROSS HyperSparc combined IU/FPU"),
99 FPU(1, "Lsi Logic L64814"),
100 FPU(2, "Texas Instruments TMS390-C602A"),
101 FPU(3, "Cypress CY7C602 FPU"),
102 FPU(-1, NULL)
113 FPU(-1, NULL)
122 FPU(-1, NULL)
138 FPU(0, "SuperSparc on-chip FPU"),
140 FPU(4, "TI MicroSparc on chip FPU"),
141 FPU(-1, NULL)
150 FPU(0, "Matsushita MN10501"),
151 FPU(-1, NULL)
160 FPU(-1, NULL)
169 FPU(-1, NULL)
178 FPU(-1, NULL)
191 FPU(3, "Fujitsu or Weitek on-chip FPU"),
192 FPU(-1, NULL)
201 FPU(2, "GRFPU"),
202 FPU(3, "GRFPU-Lite"),
203 FPU(-1, NULL)
215 FPU(0x10, "UltraSparc I integrated FPU"),
216 FPU(0x11, "UltraSparc II integrated FPU"),
217 FPU(0x12, "UltraSparc IIi integrated FPU"),
218 FPU(0x13, "UltraSparc IIe integrated FPU"),
219 FPU(-1, NULL)
228 FPU(0x10, "UltraSparc I integrated FPU"),
229 FPU(-1, NULL)
243 FPU(0x14, "UltraSparc III integrated FPU"),
244 FPU(0x15, "UltraSparc III+ integrated FPU"),
245 FPU(0x16, "UltraSparc IIIi integrated FPU"),
246 FPU(0x18, "UltraSparc IV integrated FPU"),
247 FPU(0x19, "UltraSparc IV+ integrated FPU"),
248 FPU(0x22, "UltraSparc IIIi+ integrated FPU"),
249 FPU(-1, NULL)
290 sparc_fpu_type = "No FPU"; set_cpu_and_fpu()
313 printk(KERN_ERR "FPU: Unknown chip, impl[0x%x] vers[0x%x]\n", set_cpu_and_fpu()
315 sparc_fpu_type = "Unknown FPU"; set_cpu_and_fpu()
469 sparc_fpu_type = "UltraSparc T1 integrated FPU"; sun4v_cpu_probe()
475 sparc_fpu_type = "UltraSparc T2 integrated FPU"; sun4v_cpu_probe()
481 sparc_fpu_type = "UltraSparc T3 integrated FPU"; sun4v_cpu_probe()
487 sparc_fpu_type = "UltraSparc T4 integrated FPU"; sun4v_cpu_probe()
493 sparc_fpu_type = "UltraSparc T5 integrated FPU"; sun4v_cpu_probe()
499 sparc_fpu_type = "SPARC-M6 integrated FPU"; sun4v_cpu_probe()
505 sparc_fpu_type = "SPARC-M7 integrated FPU"; sun4v_cpu_probe()
511 sparc_fpu_type = "SPARC64-X integrated FPU"; sun4v_cpu_probe()
519 sparc_fpu_type = "Unknown SUN4V FPU"; sun4v_cpu_probe()
H A Dptrace_32.c304 * FPU QUEUE COUNT (8-bit char)
305 * FPU QUEUE ENTRYSIZE (8-bit char)
306 * FPU ENABLED (8-bit char)
308 * FPU QUEUE (64 32-bit ints)
H A Dtraps_32.c187 put_psr(get_psr() | PSR_EF); /* Allow FPU ops. */ do_fpd_trap()
291 printk("WARNING: FPU exception from kernel mode. at pc=%08lx\n",
297 die_if_kernel("Too many Penguin-FPU traps from kernel mode",
H A Dptrace_64.c821 * FPU QUEUE COUNT (8-bit char)
822 * FPU QUEUE ENTRYSIZE (8-bit char)
823 * FPU ENABLED (8-bit char)
825 * FPU QUEUE (64 32-bit ints)
H A Dprocess_32.c194 /* Keep process from leaving FPU in a bogon state. */
398 /* FPU must be disabled on SMP. */
H A Dunaligned_32.c338 printk("User FPU load/store unaligned unsupported.\n"); user_unaligned_trap()
/linux-4.1.27/arch/x86/math-emu/
H A Dversion.h12 #define FPU_VERSION "wm-FPU-emu version 2.01"
H A Dexception.h22 #define FPU_BUSY Const_(0x8000) /* FPU busy bit (8087 compatibility) */
25 #define EX_INTERNAL Const_(0x8000) /* Internal error in wm-FPU-emu */
H A DMakefile2 # Makefile for wm-FPU-emu
H A Dfpu_entry.c4 | The entry functions for wm-FPU-emu |
24 | entry points for wm-FPU-emu. |
43 #ifndef NO_UNDOC_CODE /* Un-documented FPU op-codes supported by default. */
46 and may not work on FPU clones or later Intel FPUs. */
71 #else /* Support only documented FPU op-codes */
99 /* Un-documented FPU op-codes supported by default. (see above) */
112 #else /* Support only documented FPU op-codes */
159 printk("ERROR: wm-FPU-emu is not RE-ENTRANT!\n"); math_emulate()
183 printk("FPU emulator: Unsupported addressing mode\n"); math_emulate()
211 ("FPU emulator: Unknown prefix byte 0x%02x, probably due to\n" math_emulate()
212 "FPU emulator: self-modifying code! (emulation impossible)\n", math_emulate()
264 * We need to simulate the action of the kernel to FPU math_emulate()
269 FPU_EIP = FPU_ORIG_EIP; /* Point to current FPU instruction. */ math_emulate()
629 /* lock is not a valid prefix for FPU instructions, valid_prefix()
633 /* rep.. prefixes have no meaning for FPU instructions */ valid_prefix()
654 an FPU instruction. */ valid_prefix()
671 printk("ERROR: wm-FPU-emu math_abort failed!\n"); math_abort()
H A Dfpu_arith.c4 | Code to implement the FPU register/register arithmetic instructions |
H A Dfpu_etc.c4 | Implement a few FPU instructions. |
H A Dfpu_tags.c4 | Set FPU register tags. |
H A Dget_address.c4 | Get the effective address from an FPU instruction. |
192 MOD R/M byte: MOD == 3 has a special use for the FPU
266 /* Not legal for the FPU */ FPU_get_address()
340 /* Not legal for the FPU */ FPU_get_address_16()
H A Derrors.c4 | The error handling functions for wm-FPU-emu |
44 printk("Unimplemented FPU Opcode at eip=%p : ", (void __user *)address);
344 printk("FPU emulator: Unknown Exception: 0x%04x!\n", n); FPU_exception()
347 printk("FPU emulator: Internal error type 0x%04x\n", FPU_exception()
357 * The 80486 generates an interrupt on the next non-control FPU FPU_exception()
H A Dreg_round.S5 | Rounding/truncation/etc for FPU basic arithmetic functions. |
38 | %cx A control word in the same format as the FPU control word. |
66 | all of the FPU flags which are set at this stage of the basic arithmetic |
69 | a real FPU. These require a bit more thought because at this stage the |
443 * Set the FPU status flags to represent precision loss due to
455 * Set the FPU status flags to represent precision loss due to
H A Dfpu_aux.c4 | Code to implement some of the FPU auxiliary instructions. |
H A Dpoly.h4 | Header file for the FPU-emu poly*.c source files. |
H A Dload_store.c4 | This file contains most of the code to interpret the FPU instructions |
/linux-4.1.27/arch/sparc/math-emu/
H A DMakefile2 # Makefile for the FPU instruction emulation.
H A Dmath_32.c62 * Therefore when we context switch or change FPU ownership
136 * FPU. This is partly because we don't have the fpustate struct and
137 * partly because the task owning the FPU isn't always current (as is
146 * The FPU maintains a queue of FPops which cause traps. do_mathemu()
155 * because the FPU either doesn't exist or has been software-disabled. do_mathemu()
243 * In general all FPU ops will set one and only one record_exception()
/linux-4.1.27/arch/mn10300/kernel/
H A Dfpu-nofpu.c1 /* MN10300 FPU management
14 * handle an FPU operational exception
15 * - there's a possibility that if the FPU is asynchronous, the signal might
21 panic("An FPU exception was received, but there's no FPU enabled."); unexpected_fpu_exception()
25 * fill in the FPU structure for a core dump
H A Dfpu.c1 /* MN10300 FPU management
21 * error functions in FPU disabled exception
25 die_if_no_fixup("An FPU Disabled exception happened in kernel space\n", fpu_disabled_in_kernel()
30 * handle an FPU operational exception
31 * - there's a possibility that if the FPU is asynchronous, the signal might
41 die_if_no_fixup("An FPU Operation exception happened in" fpu_exception()
46 die_if_no_fixup("An FPU Operation exception happened," fpu_exception()
47 " but the FPU is not in use", fpu_exception()
72 * save the FPU state to a signal context
81 /* transfer the current FPU state to memory and cause fpu_init() to be fpu_setup_sigcontext()
82 * triggered by the next attempted FPU operation by the current fpu_setup_sigcontext()
103 /* we no longer have a valid current FPU state */ fpu_setup_sigcontext()
106 /* transfer the saved FPU state onto the userspace stack */ fpu_setup_sigcontext()
117 * kill a process's FPU state during restoration after signal handling
121 /* disown anything left in the FPU */ fpu_kill_state()
138 /* we no longer have a valid current FPU state */ fpu_kill_state()
143 * restore the FPU state from a signal context
150 /* load up the old FPU state */ fpu_restore_sigcontext()
161 * fill in the FPU structure for a core dump
H A Dfpu-nofpu-low.S1 /* MN10300 Low level FPU management operations
21 # - handle an exception due to the FPU being disabled
H A Dfpu-low.S1 /* MN10300 Low level FPU management operations
131 # - initialise the FPU
160 # - note that an FPU Operational exception might occur during this process
167 or EPSW_FE,epsw /* enable the FPU so we can access it */
188 # - handle an exception due to the FPU being disabled
H A Dptrace.c155 * retrieve the contents of MN10300 userspace FPU registers
177 * update the contents of the MN10300 userspace FPU registers
201 * determine if the FPU registers have actually been used
233 * FPU register format is:
342 case PTRACE_GETFPREGS: /* Get the child FPU state. */ arch_ptrace()
348 case PTRACE_SETFPREGS: /* Set the child FPU state. */ arch_ptrace()
H A Dprocess.c178 c_regs->epsw &= ~EPSW_FE; /* my FPU */ copy_thread()
/linux-4.1.27/arch/sh/include/uapi/asm/
H A Dsigcontext.h14 /* FPU registers */
30 /* FPU registers */
H A Dauxvec.h10 * This entry gives some information about the FPU initialization
13 #define AT_FPUCW 18 /* Used FPU control word. */
H A Dptrace.h11 #define PTRACE_GETFPREGS 14 /* FPU registers */
H A Dcpu-features.h15 #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
/linux-4.1.27/arch/mips/kernel/
H A Delf.c14 /* FPU modes */
22 * struct mode_req - ABI FPU mode requirements
23 * @single: The program being loaded needs an FPU but it will only issue
27 * loaded needs has no FPU dependency at all (i.e. it has no
28 * FPU instructions).
29 * @fr1: The program being loaded depends on FPU being in FR=1 mode.
30 * @frdefault: The program being loaded depends on the default FPU mode.
32 * @fre: The program being loaded depends on FPU with FRE=1. This mode is
166 /* It's time to determine the FPU mode requirements */ arch_check_elf()
171 * Check whether the program's and interp's ABIs have a matching FPU arch_check_elf()
181 * Determine the desired FPU mode arch_check_elf()
189 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU arch_check_elf()
194 * FPU instructions, and the default ABI FPU mode is not good arch_check_elf()
195 * (ie single + any ABI combination), we set again the FPU mode to the arch_check_elf()
198 * true but frdefault being false, then we again set the FPU mode to arch_check_elf()
202 * - Return with -ELIBADD if we can't find a matching FPU mode. arch_check_elf()
H A Dsignal-common.h27 /* Check and clear pending FPU exceptions in saved CSR */
30 /* Make sure we will not lose FPU ownership */
H A Dr2300_switch.S34 * FPU context is saved iff the process has used it's FPU in the current
37 * userland with FPU disabled after each context switch.
39 * FPU will be enabled as soon as the process accesses FPU again, through
114 * Load the FPU with signalling NANS. This bit pattern we're using has
H A Dsmp-cmp.c67 /* If we have an FPU, enroll ourselves in the FPU-full mask */ cmp_smp_finish()
111 /* If we have an FPU, enroll ourselves in the FPU-full mask */ cmp_smp_setup()
H A Dpm.c26 * Ensures that general CPU context is saved, notably FPU and DSP.
30 /* Save FPU state */ mips_cpu_save()
H A Dmips-mt-fpaff.c27 * FPU affinity with the user's requested processor affinity.
198 * FPU Use Factor empirically derived from experiments on 34K
210 printk(KERN_DEBUG "FPU Affinity set after %ld emulations\n", mt_fp_affinity_init()
H A Dirq_cpu.c22 * counter register is present or, for CPUs with an external FPU, by
23 * convention it's the FPU exception interrupt.
H A Dr4k_switch.S48 * iff the process has used the context with the scalar FPU or the MSA
57 * scheduled it will start in userland with the FPU disabled. If the
58 * task uses the FPU then it will be enabled again via the do_cpu trap.
164 * Load the FPU with signalling NANS. This bit pattern we're using has
H A Dsmp-mt.c179 /* If we have an FPU, enroll ourselves in the FPU-full mask */ vsmp_smp_finish()
240 /* If we have an FPU, enroll ourselves in the FPU-full mask */ vsmp_smp_setup()
H A Dsignal.c125 * EVA does not have FPU EVA instructions so saving fpu context directly protected_save_fp_context()
158 * EVA does not have FPU EVA instructions so restoring fpu context protected_restore_fp_context()
199 * Save FPU state to signal context. Signal handler setup_sigcontext()
200 * will "inherit" current FPU state. setup_sigcontext()
215 * If the signal handler set some FPU exceptions, clear it and fpcsr_pending()
276 /* signal handler may have used FPU. Give it up. */ restore_sigcontext()
292 * FPU emulator may have it's own trampoline active just get_sigframe()
H A Dsmp-cps.c93 /* If we have an FPU, enroll ourselves in the FPU-full mask */ cps_smp_setup()
291 /* If we have an FPU, enroll ourselves in the FPU-full mask */ cps_smp_finish()
H A Dcpu-probe.c36 * Get the FPU Implementation/Revision.
50 * Check if the CPU has an external FPU.
71 * Determine the FCSR mask for FPU hardware.
99 * Set the FIR feature flags for the FPU emulator.
116 /* Determined FPU emulator mask to use for the boot CPU with "nofpu". */
120 * Set options for FPU hardware.
140 * Set options for the FPU emulator.
1180 /* FPU in pass1 is known to have issues. */ cpu_probe_sibyte()
1510 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id); cpu_report()
H A Dproc.c61 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); show_cpuinfo()
H A Dmips-r2-to-r6-emul.c98 /* FPU instructions in delay slot */ mipsr6_emul()
278 * Negative err means FPU instruction in BD-slot, jr_func()
929 /* FPU instruction under JR */ mipsr2_decoder()
1165 if (!used_math()) { /* First time FPU user. */ mipsr2_decoder()
1169 lose_fpu(1); /* Save FPU state for the emulator. */ mipsr2_decoder()
1183 * if FPU is owned and effectively cancels user level LL/SC. mipsr2_decoder()
1184 * So, it could be logical to don't restore FPU ownership here. mipsr2_decoder()
1185 * But the sequence of multiple FPU instructions is much much mipsr2_decoder()
1186 * more often than LL-FPU-SC and I prefer loop here until mipsr2_decoder()
1187 * next scheduler cycle cancels FPU ownership mipsr2_decoder()
1189 own_fpu(1); /* Restore FPU state. */ mipsr2_decoder()
H A Dsignal32.c194 * Save FPU state to signal context. Signal handler setup_sigcontext32()
195 * will "inherit" current FPU state. setup_sigcontext32()
249 /* signal handler may have used FPU. Give it up. */ restore_sigcontext32()
H A Dr2300_fpu.S77 * Restore FPU state:
H A Dbmips_vec.S137 /* set up CP0 STATUS; enable FPU */
H A Dtraps.c790 * that for the FPU emulator. simulate_fp()
843 * Force FPU to dump state into task/thread context. We're do_fpe()
864 own_fpu(1); /* Using the FPU again. */ do_fpe()
917 * This breakpoint code is used by the FPU emulator to retake do_trap_or_bp()
1147 * MIPS MT processors may have fewer FPU contexts than CPU threads. If we've
1157 * If there's no FPU present, or if the application has already mt_ase_fp_affinity()
1399 * exceptions. Some FPU-less processors that implement one do_cpu()
H A Dbranch.c680 if (!used_math()) { /* First time FPU user */ __compute_return_epc_for_insn()
689 lose_fpu(1); /* Save FPU state for the emulator. */ __compute_return_epc_for_insn()
H A Dr4k_fpu.S162 * Restore FPU state:
H A Dunaligned.c1193 lose_fpu(1); /* Save FPU state for the emulator. */ emulate_load_store_insn()
1196 own_fpu(1); /* Restore FPU state. */ emulate_load_store_insn()
1628 lose_fpu(1); /* save the FPU state for the emulator */ emulate_load_store_microMIPS()
1631 own_fpu(1); /* restore FPU state */ emulate_load_store_microMIPS()
/linux-4.1.27/arch/sh/include/cpu-sh4/cpu/
H A Dsigcontext.h16 /* FPU registers */
H A Dfpu.h10 * Definitions for SH4 FPU operations
/linux-4.1.27/arch/arc/kernel/
H A Dfpu.c15 * To save/restore FPU regs, simplest scheme would use LR/SR insns.
17 * which uses the FPU Exchange insn (DEXCL) to r/w FPU regs.
28 * However we can tweak the read, so that read-out of outgoing task's FPU regs
H A Dsetup.c225 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", arc_extn_mumbojumbo()
279 * -If hardware contains DPFP, kernel needs to save/restore FPU state arc_chk_core_config()
289 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n"); arc_chk_core_config()
H A Dprocess.c178 * Some archs flush debug and FPU info here
/linux-4.1.27/arch/mn10300/include/asm/
H A Dcpu-regs.h58 #define EPSW_FE 0x00100000 /* FPU enable */
63 /* FPU registers */
64 #define FPCR_EF_I 0x00000001 /* inexact result FPU exception flag */
65 #define FPCR_EF_U 0x00000002 /* underflow FPU exception flag */
66 #define FPCR_EF_O 0x00000004 /* overflow FPU exception flag */
67 #define FPCR_EF_Z 0x00000008 /* zero divide FPU exception flag */
68 #define FPCR_EF_V 0x00000010 /* invalid operand FPU exception flag */
69 #define FPCR_EE_I 0x00000020 /* inexact result FPU exception enable */
70 #define FPCR_EE_U 0x00000040 /* underflow FPU exception enable */
71 #define FPCR_EE_O 0x00000080 /* overflow FPU exception enable */
72 #define FPCR_EE_Z 0x00000100 /* zero divide FPU exception enable */
73 #define FPCR_EE_V 0x00000200 /* invalid operand FPU exception enable */
74 #define FPCR_EC_I 0x00000400 /* inexact result FPU exception cause */
75 #define FPCR_EC_U 0x00000800 /* underflow FPU exception cause */
76 #define FPCR_EC_O 0x00001000 /* overflow FPU exception cause */
77 #define FPCR_EC_Z 0x00002000 /* zero divide FPU exception cause */
78 #define FPCR_EC_V 0x00004000 /* invalid operand FPU exception cause */
81 #define FPCR_FCC_U 0x00040000 /* FPU unordered condition code */
82 #define FPCR_FCC_E 0x00080000 /* FPU equal condition code */
83 #define FPCR_FCC_G 0x00100000 /* FPU greater than condition code */
84 #define FPCR_FCC_L 0x00200000 /* FPU less than condition code */
118 #define CPUREV_FPUTYPE 0x0f000000 /* FPU core type */
119 #define CPUREV_FPUTYPE_NONE 0x00000000 /* - no FPU core implemented */
166 #define sISR_FPUD 0x08000000 /* FPU disabled excep */
167 #define sISR_FPUUI 0x10000000 /* FPU unimplemented instruction excep */
168 #define sISR_FPUOP 0x20000000 /* FPU operation excep */
H A Dexceptions.h56 /* FPU exceptions */
57 EXCEP_FPU_DISABLED = 0x0001c0, /* FPU disabled */
58 EXCEP_FPU_UNIMPINS = 0x0001c8, /* FPU unimplemented operation */
59 EXCEP_FPU_OPERATION = 0x0001d0, /* FPU operation */
H A Dfpu.h1 /* MN10300 FPU definitions
28 /* the task that currently owns the FPU state */
H A Dprocessor.h104 #define THREAD_USING_FPU 0x00000001 /* T if this task is using the FPU */
105 #define THREAD_HAS_FPU 0x00000002 /* T if this task owns the FPU right now */
/linux-4.1.27/arch/metag/tbx/
H A Dtbictxfpu.S78 TSTT D0Ar4, #HI(TBICTX_CFGFPU_FX16_BIT) /* Perform test here for extended FPU registers
81 /* Save the standard FPU registers */
84 /* Save the extended FPU registers if they are present */
89 /* Save the FPU Accumulator if it is present */
141 /* Restore FPU related parts of TXDEFR. Assumes TXDEFR is coherent */
162 TSTT D0Ar4, #HI(TBICTX_CFGFPU_FX16_BIT) /* Perform test here for extended FPU registers
165 /* Save the standard FPU registers */
168 /* Save the extended FPU registers if they are present */
173 /* Save the FPU Accumulator if it is present */
/linux-4.1.27/arch/sparc/include/asm/
H A Dfpumacro.h1 /* fpumacro.h: FPU related macros.
H A Dvisasm.h4 /* visasm.h: FPU saving macros for VIS routines
H A Dthread_info_32.h109 #define TIF_USEDFPU 8 /* FPU was used by this task
/linux-4.1.27/arch/x86/include/uapi/asm/
H A Dsigcontext32.h27 /* Regular FPU environment */
37 unsigned short magic; /* 0xffff = regular FPU data only */
39 /* FXSR FPU environment */
H A Dsigcontext.h52 * The FPU state data structure has had to grow to accommodate the
53 * extended FPU state required by the Streaming SIMD Extensions.
72 /* Regular FPU environment */
82 unsigned short magic; /* 0xffff = regular FPU data only */
84 /* FXSR FPU environment */
85 unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */
88 struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */
187 struct _fpstate __user *fpstate; /* zero when no FPU context */
H A Dprocessor-flags.h105 #define X86_CR4_OSFXSR_BIT 9 /* enable fast FPU save and restore */
/linux-4.1.27/arch/x86/include/asm/
H A Di387.h5 * General FPU state handling cleanups
32 * should call the __kernel_fpu_end() to prevent the kernel/user FPU
36 * during kernel FPU usage.
95 * we can just assume we have FPU access - typically
97 * fault and get the FPU access back.
H A Dfpu-internal.h5 * General FPU state handling cleanups
74 * This will disable any lazy FPU state restore of the current FPU state, finit_soft_fpu()
75 * but if the current thread owns the FPU, it will still be saved by. finit_soft_fpu()
83 * Used to indicate that the FPU state in memory is newer than the FPU
84 * state in registers, and the FPU state should be reloaded next time the
268 * 'true' if the FPU state is still intact.
337 * Software FPU state helpers. Careful: these need to
410 * Reset the FPU state in the eager case and drop it in the lazy case (later use
422 * FPU state switching for scheduling.
440 * If the task has used the math, pre-load the FPU on xsave processors switch_fpu_prepare()
479 * given the process the FPU if we are going to preload the FPU
520 * lazy FPU mode, it is just an optimization to avoid a #NM exception,
521 * the task can lose the FPU right after preempt_enable().
H A Dsigcontext.h35 void __user *fpstate; /* zero when no FPU/extended context */
75 void __user *fpstate; /* zero when no FPU/extended context */
H A Dcmpxchg_32.h16 * A SIMD/3DNOW!/MMX/FPU 64-bit store here would require at the very
17 * least an FPU save and/or %cr0.ts manipulation.
H A Dprocessor.h319 u32 cwd; /* FPU Control Word */
320 u32 swd; /* FPU Status Word */
321 u32 twd; /* FPU Tag Word */
322 u32 fip; /* FPU IP Offset */
323 u32 fcs; /* FPU IP Selector */
324 u32 foo; /* FPU Operand Pointer Offset */
325 u32 fos; /* FPU Operand Pointer Selector */
345 u32 fip; /* FPU IP Offset */
346 u32 fcs; /* FPU IP Selector */
347 u32 foo; /* FPU Operand Offset */
348 u32 fos; /* FPU Operand Selector */
540 * that the FPU is used. If this is over a threshold, the lazy fpu
543 * lazy again; this to deal with bursty apps that only use FPU for
H A Dcpufeature.h25 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
40 /* (plus FCMOVcc, FCOMI with FPU) */
107 #define X86_FEATURE_EAGER_FPU ( 3*32+29) /* "eagerfpu" Non lazy FPU restore */
261 #define X86_BUG_FDIV X86_BUG(1) /* FPU FDIV */
H A Duser_32.h40 * the new ptrace requests. In either case, changes to the FPU environment
H A Duser_64.h41 * the new ptrace requests. In either case, changes to the FPU environment
/linux-4.1.27/arch/mips/include/asm/
H A Dbreak.h21 #define BRK_MEMU 514 /* Used by FPU emulator */
H A Dswitch_to.h49 * Handle the scheduler resume end of FPU affinity management. We do this
51 * a "CPU" with an FPU because of a previous high level of FP computation,
52 * but did not actually use the FPU during the most recent time-slice (CU1
H A Dfpu.h38 * This enum specifies a mode in which we want the FPU to operate, for cores
63 /* just enable the FPU in its current mode */ __enable_fpu()
79 /* we only have a 32-bit FPU */ __enable_fpu()
H A Dfpregdef.h2 * Definitions for the FPU register names
70 #define fcr31 $31 /* FPU status register */
H A Dthread_info.h103 #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
110 #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
H A Dprocessor.h128 * the additional information is private to the FPU emulator for now.
316 * Saved FPU/FPU emulator stuff \
324 * FPU affinity state (null if not FPAFF) \
H A Dcpu.h253 * FPU implementation/revision register (CP1 control register 0).
352 #define MIPS_CPU_FPU 0x00000020ull /* CPU has FPU */
362 #define MIPS_CPU_NOFPUEX 0x00008000ull /* no FPU exception */
H A Dhazards.h229 /* FPU hazards */
H A Dmipsregs.h690 * Coprocessor 1 (FPU) register names
702 * Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
716 * Bits in the MIPS32/64 coprocessor 1 (FPU) condition codes register.
738 * Bits in the MIPS32/64 coprocessor 1 (FPU) enables register.
744 * FPU Status Register Values
770 * Bits 22:20 of the FPU Status Register will be read as 0,
805 /* Bits 0 and 1 of FPU Status Register specify the rounding mode */
H A Dstackframe.h197 * but the FPU emulator and gdb remote debug stub
H A Dkvm_host.h389 /* FPU State */
391 /* Which FPU state is loaded (KVM_MIPS_FPU_*) */
642 /* FPU/MSA context management */
/linux-4.1.27/arch/sparc/lib/
H A DVISsave.S2 * VISsave.S: Code for saving FPU register state for
22 * FPU save/restore mechanism is already preemption safe.
H A DNGpage.S14 * and also we don't need to use the FPU in order to implement
H A DU3memcpy.S66 * 2) Only low 32 FPU registers are used so that only the
67 * lower half of the FPU register set is dirtied by this
/linux-4.1.27/arch/sh/kernel/cpu/
H A Dfpu.c16 * Memory allocation at the first usage of the FPU and other state. init_fpu()
55 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n"); fpu_state_restore()
H A Dinit.c222 /* Disable the FPU */ fpu_init()
224 printk("FPU Disabled\n"); fpu_init()
291 * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and dsp_init()
/linux-4.1.27/arch/sh/include/asm/
H A Dprocessor_32.h48 * When it's set, it means the processor doesn't have right to use FPU,
68 * FPU structure and data
117 * that the FPU is used. If this is over a threshold, the lazy fpu
120 * lazy again; this to deal with bursty apps that only use FPU for
144 * FPU lazy state save handling.
H A Dprocessor_64.h56 * When it's set, it means the processor doesn't have right to use FPU,
79 * FPU structure and data : require 8-byte alignment as we need to access it
132 * that the FPU is used. If this is over a threshold, the lazy fpu
135 * lazy again; this to deal with bursty apps that only use FPU for
178 * FPU lazy state save handling.
H A Delf.h102 * This covers all of general/DSP/FPU regs.
222 /* Optional FPU initialization */ \
H A Dthread_info.h155 #define TS_USEDFPU 0x0002 /* FPU used by this task this quantum */
/linux-4.1.27/arch/x86/kernel/
H A Di387.c5 * General FPU state handling cleanups
41 * that we don't try to save the FPU state), and TS must
46 * the thread has FPU but we are not going to set/clear TS.
66 * save the FPU state as required.
75 * Can we use the FPU in kernel mode with the
185 * the standard FPU state format. init_thread_xstate()
194 * Called at bootup to set up the initial FPU state that is later cloned
205 pr_emerg("No FPU found and no math emulation present\n"); fpu_init()
258 * The _current_ task is using the FPU for the first time
261 * remember the current task has used the FPU.
275 * Memory allocation at the first usage of the FPU and other state. init_fpu()
417 * FPU tag word conversions.
620 * FPU state for core dumps.
H A Dptrace.c871 case PTRACE_GETFPREGS: /* Get the child FPU state. */ arch_ptrace()
878 case PTRACE_SETFPREGS: /* Set the child FPU state. */ arch_ptrace()
886 case PTRACE_GETFPXREGS: /* Get the child extended FPU state. */ arch_ptrace()
892 case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ arch_ptrace()
1192 case PTRACE_GETFPREGS: /* Get the child FPU state. */ x32_arch_ptrace()
1199 case PTRACE_SETFPREGS: /* Set the child FPU state. */ x32_arch_ptrace()
1251 case PTRACE_GETFPREGS: /* Get the child FPU state. */ compat_arch_ptrace()
1257 case PTRACE_SETFPREGS: /* Set the child FPU state. */ compat_arch_ptrace()
1262 case PTRACE_GETFPXREGS: /* Get the child extended FPU state. */ compat_arch_ptrace()
1268 case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ compat_arch_ptrace()
H A Dhead_32.S341 * if and only if CPUID exists and has flags other than the FPU flag set.
359 andl $~1,%edx # Ignore CPUID.FPU
360 jz enable_paging # No flags or only CPUID.FPU = no CR4
H A Dprocess.c156 /* FPU state will be reallocated lazily at the first use. */ flush_thread()
/linux-4.1.27/arch/powerpc/kernel/
H A Dfpu.S2 * FPU support code, moved here from head.S so that it can be used
84 * Enable use of the FPU, and VSX if possible, for the caller.
120 * This task wants to use the FPU now.
121 * On UP, disable FP for the task which had the FPU previously,
124 * enable the FPU for the current task and return to the task.
140 * For SMP, we don't do lazy FPU switching because it just gets too
195 * Enables the FPU for use in the kernel on return.
H A Dcpu_setup_44x.S50 /* enable APU between CPU and FPU */
H A Dcpu_setup_6xx.S278 * Initialize the FPU registers. This is needed to work around an errata
279 * in some 750 cpus where using a not yet initialized FPU register after
/linux-4.1.27/arch/mips/include/uapi/asm/
H A Dbreak.h24 #define BRK_MEMU 514 /* Used by FPU emulator */
H A Dinst.h564 struct f_format { /* FPU register format */
575 struct ma_format { /* FPU multiply and add format (MIPS IV) */
630 struct fb_format { /* FPU branch format (MIPS32) */
639 struct fp0_format { /* FPU multiply and add format (MIPS32) */
649 struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */
660 struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */
670 struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */
680 struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */
692 struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */
702 struct mm_fp4_format { /* FPU c.cond format (microMIPS) */
713 struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */
723 struct fp6_format { /* FPU madd and msub format (MIPS IV) */
733 struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */
H A Dkvm.h61 * Register set = 3: FPU / MSA registers (see definitions below).
/linux-4.1.27/arch/m68k/include/uapi/asm/
H A Dbootinfo.h87 * CPU, FPU and MMU types (BI_CPUTYPE, BI_FPUTYPE, BI_MMUTYPE)
111 #define FPUB_68040 2 /* Internal FPU */
112 #define FPUB_68060 3 /* Internal FPU */
114 #define FPUB_COLDFIRE 5 /* ColdFire FPU */
H A Dbootinfo-mac.h101 #define MAC_MODEL_P475F 90 /* aka: P475 w/ FPU (no LC040) */
/linux-4.1.27/arch/sh/kernel/
H A Dhead_64.S121 * . SR.FD = 1 (FPU disabled)
142 * . initialize FPU
270 * r31 = FPU support flag
293 * Initialize FPU.
294 * Keep FPU flag in r31. After this block:
295 * r31 = FPU flag
312 or r21, ZERO, r31 /* Set FPU flag at last */
354 * (r31) FPU Support
H A Dprocess_64.c297 * The SH-5 FPU save/restore approach relies on exit_thread()
299 * another task tries to use the FPU for the 1st time, the FPUDIS exit_thread()
301 * existing FPU state to the FP regs field within exit_thread()
302 * last_task_used_math before re-loading the new task's FPU state exit_thread()
303 * (or initialising it if the FPU has been used before). So if exit_thread()
325 /* Force FPU state to be reinitialised after exec */ flush_thread()
398 childregs->sr |= SR_FD; /* Invalidate FPU flag */ copy_thread()
415 childregs->sr |= SR_FD; /* Invalidate FPU flag */ copy_thread()
H A Dprocess_32.c93 /* Forget lazy FPU state */ flush_thread()
208 * chances of needing FPU soon are obviously high now __switch_to()
H A Dtraps_64.c309 /* Never need to fix up misaligned FPU accesses within the kernel since that's a real
339 /* 'current' may be the current owner of the FPU state, so misaligned_fpu_load()
378 die ("Misaligned FPU load inside kernel", regs, 0); misaligned_fpu_load()
409 /* 'current' may be the current owner of the FPU state, so misaligned_fpu_store()
451 die ("Misaligned FPU load inside kernel", regs, 0); misaligned_fpu_store()
H A Dtraps_32.c631 /* not a FPU inst. */ do_reserved_inst()
717 /* not a FPU inst. */ do_illegal_slot_inst()
770 * For SH-4 lacking an FPU, treat floating point instructions as trap_init()
H A Dsignal_32.c103 attempted FPU operation by the 'current' process. save_sigcontext_fpu()
137 regs->sr |= SR_FD; /* Release FPU */ restore_sigcontext()
/linux-4.1.27/arch/sh/kernel/cpu/sh4/
H A Dfpu.c43 * Save FPU registers onto task structure.
235 /* FPU error */ ieee_fpe_handler()
262 /* FPU error because of denormal (doubles) */ ieee_fpe_handler()
273 /* FPU error because of denormal (floats) */ ieee_fpe_handler()
300 /* FPU error because of denormal (doubles) */ ieee_fpe_handler()
314 /* FPU error because of denormal (floats) */ ieee_fpe_handler()
344 /* FPU error because of denormal (doubles) */ ieee_fpe_handler()
357 /* FPU error because of denormal (floats) */ ieee_fpe_handler()
H A Dperf_event.c61 * 0x15 FPU Instruction execution
74 * 0x29 Pipeline freeze by FPU
H A Dprobe.c78 /* FPU detection works for almost everyone */ cpu_probe()
/linux-4.1.27/arch/mips/dec/
H A Dint-handler.S66 * 7 FPU
79 * 7 FPU
92 * 7 FPU/R4k timer
105 * 7 FPU/R4k timer
118 * 7 FPU/R4k timer
143 bnez t2,fpu # handle FPU immediately
H A Dsetup.c750 /* Free the FPU interrupt if the exception is present. */ arch_init_irq()
760 /* Register board interrupts: FPU and cascade. */ arch_init_irq()
/linux-4.1.27/arch/x86/include/asm/crypto/
H A Dglue_helper.h58 * enough, so do not enable FPU until it is necessary. glue_fpu_begin()
64 /* prevent sleeping if FPU is in use */ glue_fpu_begin()
/linux-4.1.27/arch/parisc/math-emu/
H A Ddriver.c24 * decodes and dispatches unimplemented FPU instructions
86 /* need an intermediate copy of float regs because FPU emulation handle_fpe()
H A Ddecode_exc.c352 printk("%s(%d) Unknown FPU exception 0x%x\n", __FILE__, decode_fpu()
/linux-4.1.27/arch/m32r/include/asm/
H A Dthread_info.h104 #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
124 #define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dbugs.c62 pr_warn("Hmm, FPU with FDIV bug\n"); check_fpu()
/linux-4.1.27/arch/x86/um/
H A Dptrace_32.c257 case PTRACE_GETFPREGS: /* Get the child FPU state. */ subarch_ptrace()
260 case PTRACE_SETFPREGS: /* Set the child FPU state. */ subarch_ptrace()
263 case PTRACE_GETFPXREGS: /* Get the child FPU state. */ subarch_ptrace()
266 case PTRACE_SETFPXREGS: /* Set the child FPU state. */ subarch_ptrace()
H A Dptrace_64.c258 case PTRACE_GETFPREGS: /* Get the child FPU state. */ subarch_ptrace()
261 case PTRACE_SETFPREGS: /* Set the child FPU state. */ subarch_ptrace()
/linux-4.1.27/arch/powerpc/xmon/
H A Dspu-opc.c31 id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction
/linux-4.1.27/arch/mips/kvm/
H A Dmips.c1394 * If FPU / MSA are enabled (i.e. the guest's FPU / MSA context kvm_mips_handle_exit()
1417 /* Enable FPU for guest and restore context */ kvm_own_fpu()
1429 * FR=0 FPU state, and we don't want to hit reserved instruction kvm_own_fpu()
1442 * Enable FPU for guest kvm_own_fpu()
1452 /* If guest FPU state not active, restore it now */ kvm_own_fpu()
1471 * Enable FPU if enabled in guest, since we're restoring FPU context kvm_own_msa()
1478 * If FR=0 FPU state is already live, it is undefined how it kvm_own_msa()
1500 * Guest FPU state already loaded, only restore upper MSA state kvm_own_msa()
1506 /* Neither FPU or MSA already active, restore full MSA state */ kvm_own_msa()
1520 /* Drop FPU & MSA without saving it */ kvm_drop_fpu()
1535 /* Save and disable FPU & MSA */ kvm_lose_fpu()
1539 * FPU & MSA get disabled in root context (hardware) when it is disabled kvm_lose_fpu()
1552 /* Disable MSA & FPU */ kvm_lose_fpu()
1564 /* Disable FPU */ kvm_lose_fpu()
H A Dtrap_emul.c50 /* FPU Unusable */ kvm_trap_emul_handle_cop_unusable()
54 * Unusable/no FPU in guest: kvm_trap_emul_handle_cop_unusable()
59 /* Restore FPU state */ kvm_trap_emul_handle_cop_unusable()
419 * No MSA in guest, or FPU enabled and not in FR=1 mode, kvm_trap_emul_handle_msa_disabled()
427 /* Restore MSA/FPU state */ kvm_trap_emul_handle_msa_disabled()
H A Demulate.c909 /* Permit FPU to be present if FPU is supported */ kvm_mips_config1_wrmask()
964 * Permit guest FPU mode changes if FPU is enabled and the relevant kvm_mips_config5_wrmask()
1123 * Don't allow CU1 or FR to be set unless FPU kvm_mips_emulate_CP0()
1138 /* Handle changes in FPU mode */ kvm_mips_emulate_CP0()
1142 * FPU and Vector register state is made kvm_mips_emulate_CP0()
1151 * how it interacts with FR=0 FPU state, and we kvm_mips_emulate_CP0()
1162 * Propagate CU1 (FPU enable) changes kvm_mips_emulate_CP0()
1163 * immediately if the FPU context is already kvm_mips_emulate_CP0()
1178 * If FPU present, we need CU1/FR bits to take kvm_mips_emulate_CP0()
1196 /* Handle changes in FPU/MSA modes */ kvm_mips_emulate_CP0()
1200 * Propagate FRE changes immediately if the FPU kvm_mips_emulate_CP0()
/linux-4.1.27/arch/mips/loongson/loongson-3/
H A Dcop2-ex.c42 /* If FPU is owned, we needn't init or restore fp */ loongson_cu2_call()
/linux-4.1.27/arch/mn10300/include/uapi/asm/
H A Dsigcontext.h15 /* Regular FPU environment */
/linux-4.1.27/arch/arm64/include/asm/
H A Dkgdb.h48 * FPU regs:
H A Dthread_info.h98 * TIF_USEDFPU - FPU was used by this task this quantum (SMP)
/linux-4.1.27/arch/cris/kernel/
H A Dprocess.c66 * When a process does an "exec", machine state like FPU and debug
/linux-4.1.27/arch/sh/kernel/cpu/sh2a/
H A Dfpu.c28 * Save FPU registers onto task structure.
93 * Emulate arithmetic ops on denormalized number for some FPU insns.
460 /* FPU error */ ieee_fpe_handler()
486 /* FPU error because of denormal */ ieee_fpe_handler()
500 /* FPU error because of denormal */ ieee_fpe_handler()
529 /* FPU error because of denormal */ ieee_fpe_handler()
543 /* FPU error because of denormal */ ieee_fpe_handler()
/linux-4.1.27/arch/m68k/ifpsp060/
H A Dfskeleton.S208 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
219 | This is the exit point for the 060FPSP when an FPU disabled exception is
222 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
223 | _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
226 | The sample code below enables the FPU, sets the PC field in the exception stack
/linux-4.1.27/arch/m68k/kernel/
H A Dsetup_mm.c244 * be confused by software FPU emulation. BEWARE. setup_arch()
245 * We should really do our own FPU check at startup. setup_arch()
476 "FPU:\t\t%s\n" show_cpuinfo()
555 pr_emerg("Upgrade your hardware or join the FPU " check_bugs()
557 panic("no FPU"); check_bugs()
H A Dptrace.c248 case PTRACE_GETFPREGS: /* Get the child FPU state. */ arch_ptrace()
254 case PTRACE_SETFPREGS: /* Set the child FPU state. */ arch_ptrace()
H A Dentry.S354 /* The 060 FPU keeps status in bits 15-8 of the first longword */
386 /* The 060 FPU keeps status in bits 15-8 of the first longword */
H A Dsetup_no.c281 "FPU:\t\t%s\n" show_cpuinfo()
/linux-4.1.27/arch/x86/include/asm/xen/
H A Dinterface.h142 /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
143 struct { char x[512]; } fpu_ctxt; /* User-level FPU registers */
/linux-4.1.27/arch/sparc/include/uapi/asm/
H A Dpstate.h59 #define TSTATE_PEF _AC(0x0000000000001000,UL) /* FPU Enable. */
74 #define FPRS_FEF _AC(0x0000000000000004,UL) /* FPU Enable. */
/linux-4.1.27/arch/mips/include/asm/dec/
H A Dinterrupts.h33 #define DEC_IRQ_FPU 6 /* R3k FPU */
87 #define DEC_CPU_INR_FPU 7 /* R3k FPU */
/linux-4.1.27/arch/powerpc/kvm/
H A Dfpu.S2 * FPU helper code to use FPU operations from inside the kernel
H A Dbook3s_pr.c397 /* Preload FPU if it's enabled */ kvmppc_set_msr_pr()
647 /* Give up external provider (FPU, Altivec, VSX) */ kvmppc_giveup_ext()
709 /* Handle external providers (FPU, Altivec, VSX) */ kvmppc_handle_ext()
1489 /* Save FPU state in thread_struct */ kvmppc_vcpu_run_pr()
1505 /* Preload FPU if it's enabled */ kvmppc_vcpu_run_pr()
1516 /* Make sure we save the guest FPU/Altivec/VSX state */ kvmppc_vcpu_run_pr()
/linux-4.1.27/arch/mips/include/asm/fw/arc/
H A Dhinv.h31 FPU, enumerator in enum:configtype
/linux-4.1.27/arch/openrisc/include/asm/
H A Delf.h41 * This covers all of general/DSP/FPU regs.
/linux-4.1.27/arch/c6x/include/asm/
H A Delf.h45 #define ELF_CORE_COPY_FPREGS(...) 0 /* No FPU regs to copy */
/linux-4.1.27/arch/nios2/kernel/
H A Dprocess.c253 /* Fill in the FPU structure for a core dump. */ dump_fpu()
256 return 0; /* Nios2 has no FPU and thus no FPU registers */ dump_fpu()
H A Dcpuinfo.c134 "FPU:\t\tnone\n" show_cpuinfo()
/linux-4.1.27/arch/arc/include/asm/
H A Darcregs.h17 #define ARC_REG_FP_BCR 0x6B /* ARCompact: Single-Precision FPU */
18 #define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
263 /* ARCompact: Both SP and DP FPU BCRs have same format */
/linux-4.1.27/arch/powerpc/perf/
H A Dpower4-pmu.c116 * UC1 - unit constraint 1: can't have all three of FPU/ISU1/IDU0|ISU2
118 * 54: FPU events needed 0x0040_0000_0000_0000
122 * UC2 - unit constraint 2: can't have all three of FPU/IFU/LSU0
124 * 50: FPU events needed 0x0004_0000_0000_0000
157 * 1 = FPU
H A Dppc970-pmu.c97 * 46-47: TTM0SEL value (0=FPU, 2=IFU, 3=VPU) 0xC000_0000_0000
102 * UC - unit constraint: can't have all three of FPU|IFU|VPU, ISU, IDU|STS
104 * 42: FPU|IFU|VPU events needed 0x0400_0000_0000
H A Dpower5+-pmu.c94 * 36-37: TTM0SEL value (0=FPU, 2=IFU, 3=ISU1) 0x30_0000_0000
99 * UC - unit constraint: can't have all three of FPU|IFU|ISU1, ISU0, IDU|GRS
101 * 32: FPU|IFU|ISU1 events needed 0x01_0000_0000
383 0x1f, /* 14 PM_GRP_MRK, PM_MRK_{FXU,FPU,LSU}_FIN */
H A Dpower5-pmu.c83 * 54-55: TTM0SEL value (0=FPU, 2=IFU, 3=ISU1) 0xc0_0000_0000_0000
99 * UC - unit constraint: can't have all three of FPU|IFU|ISU1, ISU0, IDU|GRS
101 * 36: FPU|IFU|ISU1 events needed 0x10_0000_0000
319 0x1f, /* 14 PM_GRP_MRK, PM_MRK_{FXU,FPU,LSU}_FIN */
/linux-4.1.27/arch/metag/include/asm/
H A Dmetag_regs.h48 #define TXUFP_ID 0x9 /* FPU regs */
648 * FPU EXTENSIONS
651 * The following registers only exist in FPU enabled cores.
655 * TXMODE register - FPU rounding mode control/status fields
662 * TXDEFR register - FPU exception handling/state is a significant source
687 * DETAILED FPU RELATED VALUES
702 * to gate writes to the rounding mode field. This allows other non-FPU code
703 * to modify TXMODE without knowledge of the FPU units presence and not
704 * influence the FPU rounding mode. This macro adds the required bit so new
717 * In TXSTATUS a special bit exists to indicate if FPU H/W has been accessed
761 #define TXENABLE_CLASSALT_LFPU 0x2 /* Set to indicate LITE FPU */
871 /* When a FPU exception is signalled then FPUSPEC == FPUSPEC_TAG */
H A Dtbx.h242 #define TBICTX_FPAC_BIT 0x0010 /* FPU state in TBICTX, FPU active on entry */
525 /* Remaining Address unit or FPU registers in 64-bit pairs */
568 /* The METAC_ID_CORE register state is a marker for the FPU
574 /* Recorded FPU exception state from TXDEFR in DefrFpu */
577 /* Extended thread state save areas - FPU register states */
581 /* Stored deferred TXDEFR bits related to FPU
591 /* TXMODE bits related to FPU */
594 /* FPU Even/Odd register states */
601 /* Extended thread state save areas - FPU accumulator state */
603 /* FPU accumulator register state - three 64-bit parts */
1036 /* If FPAC flag is set then significant FPU context exists. Call these routine
/linux-4.1.27/arch/xtensa/include/asm/
H A Dthread_info.h130 #define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
/linux-4.1.27/arch/sh/math-emu/
H A Dmath.c556 /* FPU error */ ieee_fpe_handler()
578 * fpu_init - Initialize FPU registers
579 * @fpu: Pointer to software emulated FPU registers.
595 * do_fpu_inst - Handle reserved instructions for FPU emulation
/linux-4.1.27/arch/x86/boot/
H A Dpm.c47 * Reset IGNNE# if asserted in the FPU.
H A Dcpucheck.c20 * proper (after FPU initialization, in particular).
/linux-4.1.27/arch/x86/crypto/
H A Dfpu.c2 * FPU: Wrapper for blkcipher touching fpu
H A Dserpent_avx2_glue.c174 /* since reusing AVX functions, starts using FPU at 8 parallel blocks */ serpent_fpu_begin()
/linux-4.1.27/arch/microblaze/kernel/cpu/
H A Dmb.c78 " FPU:\t\t%s\n", show_cpuinfo()
/linux-4.1.27/arch/score/kernel/
H A Dprocess.c62 * When a process does an "exec", machine state like FPU and debug exit_thread()
/linux-4.1.27/arch/mips/math-emu/
H A Dcp1emu.c2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
28 * the hardware FPU at the boundaries of the IEEE-754 representation
33 * Note if you know that you won't have an FPU, then you'll get much
777 * basis of the Status.FR bit. If an FPU is not present, the FR bit
778 * is hardwired to zero, which would imply a 32-bit FPU even for
780 * FPU emu is slow and bulky and optimizing this function offers fairly
783 * compatibility enabled and on 32-bit without 64-bit FPU support.
1026 * Since microMIPS FPU instructios are a subset of MIPS32 FPU cop1Emulate()
1027 * instructions, we want to convert microMIPS FPU instructions cop1Emulate()
1029 * FPU emulation code. cop1Emulate()
1038 * it cannot be a FPU instruction. This could happen cop1Emulate()
1039 * since we can be called for non-FPU instructions. cop1Emulate()
1251 /* If 16-bit instruction, not FPU. */ cop1Emulate()
1542 /*printk ("SIGFPE: FPU csr = %08x\n", fpux_emu()
2101 /*printk ("SIGFPE: FPU csr = %08x\n",ctx->fcr31); */ fpu_emu()
/linux-4.1.27/arch/avr32/include/asm/
H A Duser.h42 /* We have no FPU (yet) */
/linux-4.1.27/arch/frv/include/asm/
H A Dthread_info.h115 #define TS_USEDFPM 0x0001 /* FPU/Media was used by this task this quantum (SMP) */
H A Dmath-emu.h92 /* C representation of FPU registers */
/linux-4.1.27/arch/tile/kernel/
H A Dptrace.c212 case PTRACE_GETFPREGS: /* Get the child FPU state. */ arch_ptrace()
213 case PTRACE_SETFPREGS: /* Set the child FPU state. */ arch_ptrace()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dthread_info.h149 /* FPU was used by this task this quantum (SMP) */
/linux-4.1.27/arch/microblaze/kernel/
H A Dexceptions.c125 pr_debug("FPU exception\n"); full_exception()
H A Dprocess.c161 return 0; /* MicroBlaze has no separate FPU registers */ dump_fpu()
/linux-4.1.27/arch/avr32/kernel/
H A Dtraps.c253 /* We have no FPU yet */ do_fpe()
/linux-4.1.27/arch/blackfin/include/asm/
H A Delf.h122 #define ELF_CORE_COPY_FPREGS(...) 0 /* Blackfin has no FPU */
/linux-4.1.27/arch/m68k/sun3/
H A Dconfig.c71 enable_register |= 0x50; /* Enable FPU */ sun3_init()
/linux-4.1.27/arch/arm/include/asm/
H A Dthread_info.h144 * TIF_USEDFPU - FPU was used by this task this quantum (SMP)
/linux-4.1.27/arch/metag/kernel/
H A Dprocess.c323 * Force a restore of the FPU context next time this process is __switch_to()
363 /* Returning 0 indicates that the FPU state was not stored (as it was dump_fpu()
H A Dsetup.c449 case (0x10): return "EDSP+FPU"; get_cpu_capabilities()
450 case (0x11): return "DSP+FPU"; get_cpu_capabilities()
/linux-4.1.27/arch/powerpc/math-emu/
H A Dmath.c17 /* The instructions list which may be not implemented by a hardware FPU */
428 * If we support a HW FPU, we need to ensure the FP state do_mathemu()
/linux-4.1.27/arch/m68k/fpsp040/
H A Dfpsp.h28 | | FPU fsave area |
60 | if the FPU state after the exception is idle.
H A Dgen_except.S222 | unimplemented, no FPU restore is necessary. If it was
398 | the stack an extra 2 words and get the FPIAR from the FPU.
/linux-4.1.27/arch/x86/power/
H A Dcpu.c130 * Restore FPU regs if necessary. do_fpu_end()
/linux-4.1.27/arch/s390/kernel/
H A Dprocess.c170 * fill in the FPU structure for a core dump.
/linux-4.1.27/arch/openrisc/kernel/
H A Dprocess.c81 * When a process does an "exec", machine state like FPU and debug
/linux-4.1.27/arch/parisc/kernel/
H A Dprocess.c166 * Fill in the FPU structure for a core dump.
/linux-4.1.27/arch/powerpc/include/asm/
H A Dperf_event_server.h118 * events from the FPU, ISU and IDU simultaneously, although any two are
H A Dreg.h141 #define FPSCR_FX 0x80000000 /* FPU exception summary */
142 #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */
156 #define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */
157 #define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */
166 #define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */
167 #define FPSCR_RN 0x00000003 /* FPU rounding control */
/linux-4.1.27/arch/frv/kernel/
H A Dptrace.c174 * FPU/Media register format is:
/linux-4.1.27/arch/hexagon/kernel/
H A Dprocess.c147 * Some archs flush debug and FPU info here
/linux-4.1.27/arch/m32r/kernel/
H A Dsetup.c411 /* Force FPU initialization */ cpu_init()
/linux-4.1.27/arch/m68k/include/asm/
H A Dmath-emu.h92 /* C representation of FPU registers */
/linux-4.1.27/arch/x86/kvm/
H A Dcpuid.c301 F(FPU) | F(VME) | F(DE) | F(PSE) | __do_cpuid_ent()
311 F(FPU) | F(VME) | F(DE) | F(PSE) | __do_cpuid_ent()
/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
H A Dsetup-shx3.c23 * INTEVT values overlap with the FPU EXPEVT ones, requiring special
/linux-4.1.27/arch/unicore32/mm/
H A Dalignment.c14 * FPU ldm/stm not handling
/linux-4.1.27/fs/nfs/
H A Dnfsroot.c14 * Alan Cox : Removed get_address name clash with FPU.
/linux-4.1.27/arch/alpha/kernel/
H A Dprocess.c225 with respect to the FPU. This is all exceptions disabled. */ flush_thread()
/linux-4.1.27/drivers/lguest/x86/
H A Dcore.c252 * uses the FPU. lguest_arch_run_guest()
298 * Similarly, if we took a trap because the Guest used the FPU, lguest_arch_run_guest()
299 * we have to restore the FPU it expects to see. lguest_arch_run_guest()

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