Searched refs:EMMA2RH_SW_CASCADE (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/emma/markeins/
H A Dirq.c189 #ifdef EMMA2RH_SW_CASCADE emma2rh_irq_dispatch()
190 if (intStatus & (1UL << EMMA2RH_SW_CASCADE)) { emma2rh_irq_dispatch()
202 intStatus &= ~(1UL << EMMA2RH_SW_CASCADE); emma2rh_irq_dispatch()
288 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); arch_init_irq()
/linux-4.1.27/arch/mips/include/asm/emma/
H A Dmarkeins.h28 #define EMMA2RH_SW_CASCADE (EMMA2RH_IRQ_INT(7) - EMMA2RH_IRQ_INT(0)) macro

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