Searched refs:EBIU_DDRCTL3 (Results 1 – 3 of 3) sorted by relevance
166 #define EBIU_DDRCTL3 0xffc00a2c /* DDR Memory Control 3 Register */ macro
236 #define bfin_read_EBIU_DDRCTL3() bfin_read32(EBIU_DDRCTL3)237 #define bfin_write_EBIU_DDRCTL3(val) bfin_write32(EBIU_DDRCTL3, val)
926 D32(EBIU_DDRCTL3); in bfin_debug_mmrs_init()