Searched refs:DP_TP_CTL (Results 1 – 3 of 3) sorted by relevance
380 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()423 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()438 temp = I915_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()441 I915_WRITE(DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()442 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()1609 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_post_disable()1612 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_post_disable()2006 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()2014 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()2017 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()[all …]
2383 uint32_t temp = I915_READ(DP_TP_CTL(port)); in _intel_dp_set_link_train()2406 I915_WRITE(DP_TP_CTL(port), temp); in _intel_dp_set_link_train()3517 val = I915_READ(DP_TP_CTL(port)); in intel_dp_set_idle_link_train()3520 I915_WRITE(DP_TP_CTL(port), val); in intel_dp_set_idle_link_train()
6547 #define DP_TP_CTL(port) _PORT(port, DP_TP_CTL_A, DP_TP_CTL_B) macro