Searched refs:DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (Results 1 – 4 of 4) sorted by relevance
181 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in psb_intel_crtc_mode_set()
249 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro
6517 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in i9xx_update_pll()7816 dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5; in ironlake_compute_dpll()9255 clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? in i9xx_crtc_clock_get()
1863 #define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ macro