Searched refs:DMC1 (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/cpufreq/
H A Ds5pv210-cpufreq.c107 /* DRAM configuration (DMC0 and DMC1) */
122 DMC1, enumerator in enum:s5pv210_dmc_port
205 } else if (ch == DMC1) { s5pv210_set_refresh()
284 s5pv210_set_refresh(DMC1, 83000); s5pv210_target()
286 s5pv210_set_refresh(DMC1, 100000); s5pv210_target()
328 * 3. DMC1 refresh count for 133Mhz if (index == L4) is s5pv210_target()
333 s5pv210_set_refresh(DMC1, 133000); s5pv210_target()
439 * 10. DMC1 refresh counter s5pv210_target()
440 * L4 : DMC1 = 100Mhz 7.8us/(1/100) = 0x30c s5pv210_target()
441 * Others : DMC1 = 200Mhz 7.8us/(1/200) = 0x618 s5pv210_target()
444 s5pv210_set_refresh(DMC1, 200000); s5pv210_target()
465 * DMC1 : 200Mhz s5pv210_target()
468 s5pv210_set_refresh(DMC1, 200000); s5pv210_target()
472 * DMC1 : 100Mhz s5pv210_target()
475 s5pv210_set_refresh(DMC1, 100000); s5pv210_target()
/linux-4.1.27/drivers/devfreq/exynos/
H A Dexynos4_bus.c378 /* Change Divider - DMC1 */ exynos4x12_set_busclk()

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