Searched refs:DMA_STATUS_REG (Results 1 – 8 of 8) sorted by relevance
850 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()851 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()1750 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()1755 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1322 #define DMA_STATUS_REG 0xd034 macro
1838 #define DMA_STATUS_REG 0xd034 macro
1028 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()3830 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()3833 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()3888 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
1287 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()1288 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()3796 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()3801 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
128 case DMA_STATUS_REG: in r600_get_allowed_info_register()1529 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()1592 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
2580 #define DMA_STATUS_REG 0xd034 macro
638 #define DMA_STATUS_REG 0xd034 macro