Searched refs:DIV4_B3 (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7343.c114 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator in enum:__anon2626
125 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
209 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
H A Dclock-sh7366.c117 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, enumerator in enum:__anon2629
128 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
207 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
H A Dclock-sh7722.c123 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator in enum:__anon2632
130 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
193 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
H A Dclock-sh7723.c121 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator in enum:__anon2636
131 [DIV4_B3] = DIV4(FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
218 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),

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