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Searched refs:DISPC_CONTROL (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/arch/arm/mach-omap2/
Ddisplay.c44 #define DISPC_CONTROL 0x0040 macro
442 v = omap_hwmod_read(oh, DISPC_CONTROL); in dispc_disable_outputs()
489 v = omap_hwmod_read(oh, DISPC_CONTROL); in dispc_disable_outputs()
491 omap_hwmod_write(v, oh, DISPC_CONTROL); in dispc_disable_outputs()
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
Ddispc.c176 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 0, 0 },
177 [DISPC_MGR_FLD_STNTFT] = { DISPC_CONTROL, 3, 3 },
178 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 5, 5 },
179 [DISPC_MGR_FLD_TFTDATALINES] = { DISPC_CONTROL, 9, 8 },
180 [DISPC_MGR_FLD_STALLMODE] = { DISPC_CONTROL, 11, 11 },
193 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL, 1, 1 },
195 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL, 6, 6 },
267 const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG; in mgr_fld_write()
2787 REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29); in dispc_lcd_enable_signal_polarity()
2795 REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28); in dispc_lcd_enable_signal()
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Ddispc.h30 #define DISPC_CONTROL 0x0040 macro