Searched refs:DE4X5_MII (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/dec/tulip/
H A Dde4x5.c2771 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); dc21140m_autoconf()
2784 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); dc21140m_autoconf()
2803 mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII); dc21140m_autoconf()
2827 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); dc21140m_autoconf()
2828 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); dc21140m_autoconf()
2973 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); dc2114x_autoconf()
2986 mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII); dc2114x_autoconf()
3011 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); dc2114x_autoconf()
3012 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); dc2114x_autoconf()
3305 mii_wr(MII_CR_RST, MII_CR, lp->phy[lp->active].addr, DE4X5_MII); de4x5_reset_phy()
3449 reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask; test_mii_reg()
3469 spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII); is_spd_100()
3493 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); is_100_up()
3494 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS; is_100_up()
3514 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); is_10_up()
3515 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII) & MII_SR_LKS; is_10_up()
3536 return mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); is_anc_capable()
4978 id = mii_get_oui(i, DE4X5_MII); mii_get_phy()
5015 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); mii_get_phy()
5016 while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST); mii_get_phy()
5267 printk("MII CR: %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5268 printk("MII SR: %x\n",mii_rd(MII_SR,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5269 printk("MII ID0: %x\n",mii_rd(MII_ID0,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5270 printk("MII ID1: %x\n",mii_rd(MII_ID1,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5272 printk("MII ANA: %x\n",mii_rd(0x04,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5273 printk("MII ANC: %x\n",mii_rd(0x05,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5275 printk("MII 16: %x\n",mii_rd(0x10,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5277 printk("MII 17: %x\n",mii_rd(0x11,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5278 printk("MII 18: %x\n",mii_rd(0x12,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5280 printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); de4x5_dbg_mii()
5518 tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5519 tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5520 tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5521 tmp.lval[j>>2]=mii_rd(MII_ID1,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5523 tmp.lval[j>>2]=mii_rd(MII_ANA,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5524 tmp.lval[j>>2]=mii_rd(MII_ANLPA,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5526 tmp.lval[j>>2]=mii_rd(0x10,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5528 tmp.lval[j>>2]=mii_rd(0x11,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5529 tmp.lval[j>>2]=mii_rd(0x12,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
5531 tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4; de4x5_ioctl()
H A Dde4x5.h28 #define DE4X5_MII iobase+(0x048 << lp->bus) /* MII Interface Register */ macro
423 ** DC21041 Serial/Ethernet Address ROM (DE4X5_SROM, DE4X5_MII)
925 mii_wr(MII_CR_10|(lp->fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
947 mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
948 0x18, lp->phy[lp->active].addr, DE4X5_MII);\
951 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
954 mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
975 mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\

Completed in 145 milliseconds