Searched refs:DDR_BASE_CS_OFF (Results 1 – 1 of 1) sorted by relevance
92 #define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) macro390 u32 basereg = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); in mvebu_sdram_debug_show_orion()588 u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); in mvebu_mbus_default_setup_cpu_target()620 u32 base = readl(mbus->sdramwins_base + DDR_BASE_CS_OFF(i)); in mvebu_mbus_default_save_cpu_target()623 writel(mbus->sdramwins_phys_base + DDR_BASE_CS_OFF(i), in mvebu_mbus_default_save_cpu_target()