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Searched refs:Clock (Results 1 – 200 of 230) sorted by relevance

12

/linux-4.1.27/drivers/clk/
DKconfig24 menu "Common Clock Framework"
28 tristate "Clock driver for WM831x/2x PMICs"
40 tristate "Clock driver for Maxim 77686 MFD"
47 tristate "Clock driver for Maxim 77802 PMIC"
54 tristate "Clock driver for RK808"
63 tristate "Clock driver for SiLabs 5351A/B/C"
72 tristate "Clock driver for SiLabs 570 and compatible devices"
82 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
106 bool "Clock driver for Freescale QorIQ platforms"
113 bool "Clock driver for APM XGene SoC"
[all …]
/linux-4.1.27/drivers/clk/qcom/
DKconfig9 tristate "APQ8084 Global Clock Controller"
17 tristate "APQ8084 Multimedia Clock Controller"
26 tristate "IPQ806x Global Clock Controller"
34 tristate "IPQ806x LPASS Clock Controller"
43 tristate "MSM8660 Global Clock Controller"
51 tristate "MSM8916 Global Clock Controller"
59 tristate "APQ8064/MSM8960 Global Clock Controller"
67 tristate "APQ8064/MSM8960 LPASS Clock Controller"
76 tristate "MSM8960 Multimedia Clock Controller"
85 tristate "MSM8974 Global Clock Controller"
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dmvebu-gated-clock.txt1 * Gated Clock bindings for Marvell EBU SoCs
11 ID Clock Peripheral
14 1 pex0_en PCIe 0 Clock out
15 2 pex1_en PCIe 1 Clock out
27 ID Clock Peripheral
32 5 pex0 PCIe 0 Clock out
33 6 pex1 PCIe 1 Clock out
54 ID Clock Peripheral
81 ID Clock Peripheral
93 ID Clock Peripheral
[all …]
Demev2-clock.txt1 Device tree Clock bindings for Renesas EMMA Mobile EV2
15 "Serial clock generator" in fig."Clock System Overview" of the manual,
27 Clock gating node shown as "Clock stop processing block" in the
28 fig."Clock System Overview" of the manual.
Defm32-clock.txt1 * Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit
Dzynq-7000.txt1 Device Tree Clock bindings for the Zynq 7000 EPP
9 == Clock Controller ==
31 Clock inputs:
40 Clock outputs:
Dalphascale,acc.txt1 Alphascale Clock Controller
3 The ACC (Alphascale Clock Controller) is responsible of choising proper
108 Clock consumer with only one, _AHB_ sink.
Dmvebu-core-clock.txt1 * Core Clock bindings for Marvell MVEBU SoCs
30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
32 5 = refclk (Reference Clock)
Darm-integrator.txt1 Clock bindings for ARM Integrator and Versatile Core Module clocks
3 Auxiliary Oscillator Clock
Dimx23-clock.txt1 * Clock bindings for Freescale i.MX23
12 Clock ID
Dprima2-clock.txt1 * Clock bindings for CSR SiRFprimaII
13 Clock ID
Dimx31-clock.txt1 * Clock bindings for Freescale i.MX31
13 Clock ID
Dimx28-clock.txt1 * Clock bindings for Freescale i.MX28
12 Clock ID
Dimx35-clock.txt1 * Clock bindings for Freescale i.MX35
13 Clock ID
Dnvidia,tegra30-car.txt1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dnvidia,tegra20-car.txt1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Drenesas,cpg-div6-clocks.txt1 * Renesas CPG DIV6 Clock
3 The CPG DIV6 clocks are variable factor clocks provided by the Clock Pulse
Dnvidia,tegra114-car.txt1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dste-u300-syscon-clock.txt1 Clock bindings for ST-Ericsson U300 System Controller Clocks
19 Type: ID: Clock:
Dnvidia,tegra124-car.txt1 NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
Dimx25-clock.txt1 * Clock bindings for Freescale i.MX25
13 Clock ID
Dsamsung,s3c2412-clock.txt1 * Samsung S3C2412 Clock Controller
30 Example: Clock controller node:
Dsamsung,s3c2410-clock.txt1 * Samsung S3C2410 Clock Controller
31 Example: Clock controller node:
Dclk-s5pv210-audss.txt1 * Samsung Audio Subsystem Clock Controller
30 Example: Clock controller node.
Dqoriq-clock.txt1 * Clock Block on Freescale QorIQ Platforms
18 1. Clock Block Binding
23 Clock block strings include, but not limited to, one of the:
51 2. Clock Provider/Consumer Binding
Drockchip,rk3288-cru.txt1 * Rockchip RK3288 Clock and Reset Unit
40 Example: Clock controller node:
Dsamsung,s3c2443-clock.txt1 * Samsung S3C2443 Clock Controller
35 Example: Clock controller node:
Drockchip,rk3188-cru.txt1 * Rockchip RK3188/RK3066 Clock and Reset Unit
40 Example: Clock controller node:
Dsamsung,s5pv210-clock.txt1 * Samsung S5P6442/S5PC110/S5PV210 Clock Controller
40 Example: Clock controller node:
Dsamsung,s3c64xx-clock.txt1 * Samsung S3C64xx Clock Controller
39 Example: Clock controller node:
Dpxa-clock.txt1 * Clock bindings for Marvell PXA chips
Dqcom,lcc.txt1 Qualcomm LPASS Clock & Reset Controller Binding
Dexynos7-clock.txt1 * Samsung Exynos7 Clock Controller
22 Required Properties for Clock Controller:
Dqcom,mmcc.txt1 Qualcomm Multimedia Clock & Reset Controller Binding
Dimx6sl-clock.txt1 * Clock bindings for Freescale i.MX6 SoloLite
Dclock-bindings.txt5 tree. Those nodes are designated as clock providers. Clock consumer
14 ==Clock providers==
32 Clock consumer nodes must never directly reference
63 ==Clock consumers==
Dqcom,gcc.txt1 Qualcomm Global Clock & Reset Controller Binding
Dclps711x-clock.txt1 * Clock bindings for the Cirrus Logic CLPS711X CPUs
Dhi3620-clock.txt1 * Hisilicon Hi3620 Clock Controller
Drenesas,r8a7778-cpg-clocks.txt1 * Renesas R8A7778 Clock Pulse Generator (CPG)
Dmvebu-corediv-clock.txt1 * Core Divider Clock bindings for Marvell MVEBU SoCs
Dimx6sx-clock.txt1 * Clock bindings for Freescale i.MX6 SoloX
Dmvebu-cpu-clock.txt1 Device Tree Clock bindings for cpu clock of Marvell EBU platforms
Dclk-exynos-audss.txt1 * Samsung Audio Subsystem Clock Controller
41 Clock ID SoC (if specific)
Drenesas,r8a7779-cpg-clocks.txt1 * Renesas R8A7779 Clock Pulse Generator (CPG)
Dimx27-clock.txt1 * Clock bindings for Freescale i.MX27
Dimx1-clock.txt1 * Clock bindings for Freescale i.MX1 CPUs
Dimx21-clock.txt1 * Clock bindings for Freescale i.MX21
Dmarvell,mmp2.txt1 * Marvell MMP2 Clock Controller
Dmarvell,pxa168.txt1 * Marvell PXA168 Clock Controller
Dhix5hd2-clock.txt1 * Hisilicon Hix5hd2 Clock Controller
Dexynos5440-clock.txt1 * Samsung Exynos5440 Clock Controller
Dmarvell,pxa910.txt1 * Marvell PXA910 Clock Controller
Dcalxeda.txt1 Device Tree Clock bindings for Calxeda highbank platform
Dimx5-clock.txt1 * Clock bindings for Freescale i.MX5
Dimx6q-clock.txt1 * Clock bindings for Freescale i.MX6 Quad
Drenesas,r8a73a4-cpg-clocks.txt1 * Renesas R8A73A4 Clock Pulse Generator (CPG)
Drenesas,rz-cpg-clocks.txt1 * Renesas RZ Clock Pulse Generator (CPG)
Drenesas,sh73a0-cpg-clocks.txt3 * Renesas SH73A0 Clock Pulse Generator (CPG)
Dmoxa,moxart-clock.txt1 Device Tree Clock bindings for arch-moxart
Drenesas,r8a7740-cpg-clocks.txt3 * Renesas R8A7740 Clock Pulse Generator (CPG)
Dmaxim,max77686.txt39 Example: Clock consumer node
Dexynos5250-clock.txt1 * Samsung Exynos5250 Clock Controller
Dexynos4415-clock.txt1 * Samsung Exynos4415 Clock Controller
Dmaxim,max77802.txt37 Example: Clock consumer node
Dvf610-clock.txt1 * Clock bindings for Freescale Vybrid VF610 SOC
Drenesas,rcar-gen2-cpg-clocks.txt1 * Renesas R-Car Gen2 Clock Pulse Generator (CPG)
Dexynos5410-clock.txt1 * Samsung Exynos5410 Clock Controller
Dexynos5420-clock.txt1 * Samsung Exynos5420 Clock Controller
Dbrcm,kona-ccu.txt72 CCU Clock Type Index Specifier
117 CCU Clock Type Index Specifier
Dexynos5260-clock.txt1 * Samsung Exynos5260 Clock Controller
49 Required Properties for Clock Controller:
Dexynos4-clock.txt1 * Samsung Exynos4 Clock Controller
Dexynos3250-clock.txt1 * Samsung Exynos3250 Clock Controller
Daltr_socfpga.txt1 Device Tree Clock bindings for Altera's SoCFPGA platform
Drockchip.txt1 Device Tree Clock bindings for arch-rockchip
Dvt8500.txt1 Device Tree Clock bindings for arch-vt8500
Dsunxi.txt1 Device Tree Clock bindings for arch-sunxi
98 Clock consumers should specify the desired clocks they use with a
Dxgene.txt1 Device Tree Clock bindings for APM X-Gene
Dat91-clock.txt1 Device Tree Clock bindings for arch-at91
10 at91 SCKC (Slow Clock Controller)
/linux-4.1.27/Documentation/frv/
Dclock.txt1 Clock scaling
42 Clock-In: 50.00 MHz
43 Clock-Core: 300.00 MHz
44 Clock-SDRAM: 100.00 MHz
45 Clock-CBus: 100.00 MHz
46 Clock-Res: 50.00 MHz
47 Clock-Ext: 50.00 MHz
48 Clock-DSU: 25.00 MHz
/linux-4.1.27/drivers/iio/frequency/
DKconfig4 # Clock Distribution device drivers
11 menu "Clock Generator/Distribution"
14 tristate "Analog Devices AD9523 Low Jitter Clock Generator"
18 Clock Generator. The driver provides direct access via sysfs.
/linux-4.1.27/drivers/clk/versatile/
DKconfig2 bool "Clock driver for ARM Reference designs"
11 bool "Clock driver for ARM SP810 System Controller"
19 bool "Clock driver for Versatile Express OSC clock generators"
/linux-4.1.27/Documentation/input/
Damijoy.txt90 | 0 | M0H | JOY0DAT Horizontal Clock |
91 | 1 | M0HQ | JOY0DAT Horizontal Clock (quadrature) |
92 | 2 | M0V | JOY0DAT Vertical Clock |
93 | 3 | M0VQ | JOY0DAT Vertical Clock (quadrature) |
94 | 4 | M1V | JOY1DAT Horizontal Clock |
95 | 5 | M1VQ | JOY1DAT Horizontal Clock (quadrature) |
96 | 6 | M1V | JOY1DAT Vertical Clock |
97 | 7 | M1VQ | JOY1DAT Vertical Clock (quadrature) |
Djoystick-parport.txt80 NES and SNES pads have two input bits, Clock and Latch, which drive the
84 (pin 2) -----> Clock
117 | | | +-> Ground | +------------------> Clock
118 | | +----> Clock +---------------------> Power
124 +---------> Clock +-----------------> Data
132 | | | | +----> Clock
323 | | | | | +--------> Clock --- (4)
/linux-4.1.27/Documentation/devicetree/bindings/arm/altera/
Dsocfpga-clk-manager.txt1 Altera SOCFPGA Clock Manager
5 - reg : Should contain base address and length for Clock Manager
/linux-4.1.27/Documentation/devicetree/bindings/rtc/
Dxgene-rtc.txt1 * APM X-Gene Real Time Clock
3 RTC controller for the APM X-Gene Real Time Clock
Dvia,vt8500-rtc.txt1 VIA/Wondermedia VT8500 Realtime Clock Controller
Dmaxim,ds1742.txt1 * Maxim (Dallas) DS1742/DS1743 Real Time Clock
Dlpc32xx-rtc.txt1 * NXP LPC32xx SoC Real Time Clock controller
Dnxp,rtc-2123.txt1 NXP PCF2123 SPI Real Time Clock
Datmel,at91rm9200-rtc.txt1 Atmel AT91RM9200 Real Time Clock
Ddigicolor-rtc.txt1 Conexant Digicolor Real Time Clock controller
Dimxdi-rtc.txt1 * i.MX25 Real Time Clock controller
Dorion-rtc.txt1 * Mvebu Real Time Clock
Dsunxi-rtc.txt1 * sun4i/sun7i Real Time Clock
Dsun6i-rtc.txt1 * sun6i Real Time Clock
Dstmp3xxx-rtc.txt1 * STMP3xxx/i.MX28 Time Clock controller
Dhaoyu,hym8563.txt1 Haoyu Microelectronics HYM8563 Real Time Clock
Dsa1100-rtc.txt1 * Marvell Real Time Clock controller
Ddallas,ds1339.txt1 * Dallas DS1339 I2C Serial Real-Time Clock
Darmada-380-rtc.txt1 * Real Time Clock of the Armada 38x SoCs
Drtc-omap.txt1 TI Real Time Clock
Ds3c-rtc.txt1 * Samsung's S3C Real Time Clock controller
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-class-rtc-rtc0-device-rtc_calibration1 What: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock
6 calibrate the AB8500.s 32KHz Real Time Clock.
Dsysfs-firmware-acpi146 ff_rt_clk - Real Time Clock
/linux-4.1.27/Documentation/devicetree/bindings/iio/frequency/
Dadf4350.txt9 - clocks: From common clock binding. Clock is phandle to clock for
10 ADF435x Reference Clock (CLKIN).
48 - adi,12bit-clk-divider: Clock divider value used when
52 0: Clock divider off (default)
/linux-4.1.27/Documentation/sound/alsa/
Dhdspm.txt115 System Clock -- suspended !!!!
117 Name -- "System Clock Mode"
125 Clock-source controller, which is a kind of ALSA-standard. I
129 Clock-source-controller instead !!!!
131 Clock Source
133 Name -- "Sample Clock Source"
290 Word Clock Sync Status
292 Name -- "Word Clock Lock Status"
298 Word Clock Input is 0=Unlocked, 1=Locked, or 2=Synced.
DControlNames.txt92 Sample Clock Source { "Word", "Internal", "AutoSync" }
93 Clock Sync Status { "Lock", "Sync", "No Lock" }
DMIXART.txt13 (AES/EBU, Word Clock, Time Code and Video Synchro)
65 - external clock support (AES/EBU, Word Clock, Time Code, Video Sync)
/linux-4.1.27/Documentation/sound/alsa/soc/
Dclocking.txt8 Master Clock
23 The Digital Audio Interface is usually driven by a Bit Clock (often referred to
31 Bit Clock can be generated as follows:-
/linux-4.1.27/Documentation/devicetree/bindings/metag/
Dmeta.txt13 - clocks: Clock consumer specifiers as described in
16 - clock-names: Clock consumer names as described in
/linux-4.1.27/Documentation/devicetree/bindings/pwm/
Dimx-pwm.txt11 - clocks : Clock specifiers for both ipg and per clocks.
12 - clock-names : Clock names should include both "ipg" and "per"
/linux-4.1.27/drivers/video/fbdev/sis/
Dinitextlfb.c55 int Clock; in sisfb_mode_rate_to_dclock() local
88 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000; in sisfb_mode_rate_to_dclock()
90 return Clock; in sisfb_mode_rate_to_dclock()
/linux-4.1.27/Documentation/devicetree/bindings/net/
Dmicrel.txt22 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
25 Setting the RMII Reference Clock Select bit enables 25 MHz rather
Darc_emac.txt10 Clock handling:
Demac_rockchip.txt16 Clock handling:
Dfsl-tsec-phy.txt88 Clock Properties:
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Dtrivial-devices.txt12 abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
41 dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock
69 mc,rv3029c2 Real Time Clock Module with I2C-Bus
79 nxp,pcf85063 Tiny Real-Time Clock
82 pericom,pt7c4338 Real-time Clock Module
Dti,bq32k.txt1 * TI BQ32000 I2C Serial Real-Time Clock
/linux-4.1.27/Documentation/cpu-freq/
Dindex.txt13 Clock scaling allows you to change the clock speed of the CPUs on the
53 Clock and voltage scaling for the SA-1100:
Dcore.txt14 Clock scaling allows you to change the clock speed of the CPUs on the
Duser-guide.txt13 Clock scaling allows you to change the clock speed of the CPUs on the
/linux-4.1.27/Documentation/devicetree/bindings/spi/
Dfsl-imx-cspi.txt16 - clocks : Clock specifiers for both ipg and per clocks.
17 - clock-names : Clock names should include both "ipg" and "per"
Dspi-cadence.txt12 - clocks : Clock phandles (see clock bindings for details).
/linux-4.1.27/Documentation/devicetree/bindings/sound/
Dfsl,spdif.txt24 "rxtx<0-7>" Clock source list for tx and rx clock.
27 Transceiver Clock Diagram" of SoC reference manual.
Dtlv320aic32x4.txt19 - clocks/clock-names: Clock named 'mclk' for the master clock of the codec.
Ddavinci-evm-audio.txt14 - ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec.
Dfsl,asrc.txt27 "asrck_<0-f>" Clock sources for input and output clock.
/linux-4.1.27/Documentation/devicetree/bindings/mfd/
Dda9063.txt8 da9063-rtc : : Real-Time Clock
50 - rtc : This node defines settings for the Real-Time Clock associated with
Dmt6397.txt8 - Clock
Dsun6i-prcm.txt1 * Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
Dqcom-pm8xxx.txt56 == Real-Time Clock
Ds2mps11.txt31 Clock ID Devices
Dab8500.txt57 ab8500-rtc : 60S : : Real Time Clock
/linux-4.1.27/Documentation/devicetree/bindings/serial/
Dbrcm,bcm6345-uart.txt11 - clocks: Clock driving the hardware; used to figure out the baud rate
Dmtk-uart.txt17 - clocks: Clock driving the hardware.
Dsnps-dw-apb-uart.txt8 Clock handling:
/linux-4.1.27/Documentation/i2c/busses/
Di2c-pca-isa17 Clock rate as described in table 1 of PCA9564 datasheet
Di2c-sis63020 * high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
/linux-4.1.27/arch/arm/boot/dts/
Dorion5x-rd88f5182-nas.dts134 * MPP[20] PCI Clock to MV88F5182
135 * MPP[21] PCI Clock to mini PCI CON11
Dste-href-ab8505.dtsi186 * Clock output pins associated with regulators.
Darmada-385-db-ap.dts151 * The Reference Clock 0 is used to
Dste-href-ab8500.dtsi374 * Clock output pins associated with regulators.
Darmada-388-gp.dts146 * The Reference Clock 0 is used to provide a
Dste-href-family-pinctrl.dtsi617 "lcdaclk_b_1", /* Clock line for TV-out */
/linux-4.1.27/Documentation/timers/
Dtimekeeping.txt1 Clock sources, Clock events, sched_clock() and delay timers
21 Clock sources
84 Clock events
87 Clock events are the conceptual reverse of clock sources: they take a
91 Clock events are orthogonal to clock sources. The same hardware
D00-INDEX16 - Clock sources, clock events, sched_clock() and delay timer notes
/linux-4.1.27/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-exynos5440.txt14 - clock-latency: Clock monitor latency in microsecond.
/linux-4.1.27/Documentation/devicetree/bindings/gpio/
Dgpio-zynq.txt10 - clocks : Clock specifier (see clock bindings for details)
/linux-4.1.27/Documentation/devicetree/bindings/clock/ti/
Ddra7-atl.txt1 Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
12 Clock tree binding:
/linux-4.1.27/Documentation/devicetree/bindings/gpu/
Dsamsung-rotator.txt15 - clocks : Clock specifier for rotator clock, according to generic clock
/linux-4.1.27/Documentation/devicetree/bindings/crypto/
Dimg-hash.txt13 - clocks : Clock specifiers
/linux-4.1.27/Documentation/devicetree/bindings/arm/msm/
Dqcom,kpss-acc.txt1 Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
/linux-4.1.27/Documentation/devicetree/bindings/media/i2c/
Dtvp514x.txt21 - pclk-sample: Clock polarity of the endpoint.
Dtvp7002.txt16 - pclk-sample: Clock polarity of the bus. Default value when this property is
/linux-4.1.27/Documentation/devicetree/bindings/c6x/
Dclocks.txt1 C6X PLL Clock Controllers
/linux-4.1.27/Documentation/devicetree/bindings/usb/
Dkeystone-usb.txt15 - clocks: Clock IDs array as required by the controller.
Dsamsung-usbphy.txt17 - clocks: Clock IDs array as required by the controller.
78 - clocks: Clock IDs array as required by the controller.
Dusb3503.txt18 - refclk: Clock used for driving REFCLK signal (optional, if not provided
Dexynos-usb.txt93 - clocks: Clock IDs array as required by the controller.
/linux-4.1.27/Documentation/ptp/
Dptp.txt57 Clock drivers include include/linux/ptp_clock_kernel.h and register
59 registration method. Clock drivers must implement all of the
/linux-4.1.27/Documentation/devicetree/bindings/net/can/
Dxilinx_can.txt16 - clocks : Clock phandles (see clock bindings for details).
Drcar_can.txt17 - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
/linux-4.1.27/Documentation/devicetree/bindings/arm/omap/
Dprcm.txt3 Power Reset and Clock Manager lists the device clocks and clockdomains under
/linux-4.1.27/Documentation/devicetree/bindings/input/touchscreen/
Dstmpe.txt14 - st,adc-freq: ADC Clock speed (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz)
/linux-4.1.27/drivers/video/fbdev/savage/
Dsavagefb.h138 unsigned int Clock; member
164 unsigned char Clock; member
Dsavagefb_driver.c988 timings.Clock = 1000000000 / pixclock; in savagefb_decode_var()
989 if (timings.Clock < 1) timings.Clock = 1; in savagefb_decode_var()
1021 dclk = timings.Clock; in savagefb_decode_var()
/linux-4.1.27/Documentation/devicetree/bindings/arm/
Datmel-at91.txt130 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
134 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
Dmarvell,berlin.txt72 * Clock provider binding
/linux-4.1.27/Documentation/devicetree/bindings/power/
Dfsl,imx-gpc.txt14 - clocks: Clock phandles to devices in the PU power domain that need
/linux-4.1.27/arch/blackfin/
DKconfig425 comment "Clock/PLL Setup"
456 bool "Half Clock In"
479 prompt "Core Clock Divider"
500 int "System Clock Divider"
509 System Clock = (PLL frequency) / (this setting)
520 System Clock0 = (System Clock) / (this setting)
530 System Clock1 = (System Clock) / (this setting)
533 int "DDR Clock Divider"
540 DDR Clock = (PLL frequency) / (this setting)
662 menu "Clock event device"
[all …]
/linux-4.1.27/Documentation/hwmon/
Dmax19740 7,6 PD1,PD0 Clock and Power-Down modes
/linux-4.1.27/Documentation/devicetree/bindings/interrupt-controller/
Dmips-gic.txt33 - clock-frequency : Clock frequency at which the GIC timers operate.
/linux-4.1.27/Documentation/devicetree/bindings/clock/st/
Dst,flexgen.txt30 | | ------- | | Clock | | | | | | |
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/4xx/
Dcpm.txt1 PPC4xx Clock Power Management (CPM) node
/linux-4.1.27/drivers/pci/pcie/
DKconfig36 Power Management) and Clock Power Management. ASPM supports
/linux-4.1.27/Documentation/arm/Samsung-S3C24XX/
DS3C2412.txt12 Clock
/linux-4.1.27/Documentation/devicetree/bindings/memory-controllers/
Dingenic,jz4780-nemc.txt10 - clocks: Clock for the NEMC controller.
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/
Dpmc.txt23 is the PMC block, and the second resource is the Clock Configuration
Dmpc5200.txt63 bus-frequency IPB bus frequency in Hz. Clock rate
76 cdm@<addr> fsl,mpc5200-cdm Clock Distribution
/linux-4.1.27/Documentation/
Drtc.txt2 Real Time Clock (RTC) Drivers for Linux
5 When Linux developers talk about a "Real Time Clock", they usually mean
38 All PCs (even Alpha machines) have a Real Time Clock built into them.
/linux-4.1.27/arch/unicore32/configs/
Dunicore32_defconfig167 # Real Time Clock
/linux-4.1.27/Documentation/mmc/
Dmmc-dev-attrs.txt76 SD/MMC/SDIO Clock Gating Attribute
/linux-4.1.27/arch/m32r/
DKconfig179 int "Bus Clock [Hz] (integer)"
290 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
/linux-4.1.27/Documentation/fb/
Dep93xx-fb.txt53 EP93XXFB_PCLK_FALLING Clock data on the falling edge of the
/linux-4.1.27/drivers/net/ethernet/ti/
DKconfig86 and Layer 2 packets, and the driver offers a PTP Hardware Clock.
/linux-4.1.27/Documentation/power/
Ds2ram.txt67 pm_trace uses the system's Real Time Clock (RTC) to save the magic number.
/linux-4.1.27/drivers/rtc/
DKconfig9 bool "Real Time Clock"
955 Real Time Clock.
1135 tristate "Freescale IMX DryIce Real Time Clock"
1144 tristate "TI OMAP Real Time Clock"
1164 RTC (Realtime Clock) driver for the clock inbuilt into the
1240 Driver for the internal RTC (Realtime Clock) on Atmel AVR32
1247 Driver for the internal RTC (Realtime Clock) module found on
1280 Blackfin On-Chip Real Time Clock.
1351 Driver for the internal RTC (Realtime Clock) module found on
1496 tristate "Freescale MXC Real Time Clock"
/linux-4.1.27/arch/powerpc/boot/dts/
Dmpc5125twr.dts103 clks: clock@f00 { // Clock control
Dmpc5121.dtsi138 /* Clock control */
/linux-4.1.27/drivers/clocksource/
DKconfig1 menu "Clock Source drivers"
/linux-4.1.27/Documentation/ia64/
Defirtc.txt1 EFI Real Time Clock driver
/linux-4.1.27/Documentation/devicetree/bindings/phy/
Dsamsung-phy.txt134 - clocks: Clock IDs array as required by the controller
/linux-4.1.27/arch/m32r/platforms/opsput/
Ddot.gdbinit196 # Clock
/linux-4.1.27/drivers/media/pci/ngene/
Dngene-core.c107 Clock, Flags)) { in demux_tasklet()
158 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
163 Cur->ngeneBuffer.SR.Clock, in demux_tasklet()
Dngene.h169 u32 Clock; /* Stream time in 100ns units */ member
/linux-4.1.27/drivers/staging/xgifb/
DXGI_main_26.c68 int Clock; in XGIfb_mode_rate_to_dclock() local
79 Clock = XGI_VCLKData[ClockIndex].CLOCK * 1000; in XGIfb_mode_rate_to_dclock()
81 return Clock; in XGIfb_mode_rate_to_dclock()
/linux-4.1.27/drivers/char/
DKconfig281 tristate "Enhanced Real Time Clock Support (legacy PC RTC driver)"
308 tristate "Enhanced Real Time Clock Support"
355 bool "EFI Real Time Clock Services"
/linux-4.1.27/drivers/net/wireless/libertas/
DREADME107 p3 is Clock stabilization time in usec (0-65535)
/linux-4.1.27/Documentation/spi/
Dpxa2xx31 corresponding SSP peripheral block in the "Clock Enable Register (CKEN"). See

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