Searched refs:CVMX_PEXP_SLI_S2M_PORTX_CTL (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/octeon/
H A Dcvmx-pexp-defs.h215 #define CVMX_PEXP_SLI_S2M_PORTX_CTL(offset) (CVMX_ADD_IO_SEG(0x00011F0000013D80ull) + ((offset) & 3) * 16) macro
/linux-4.1.27/arch/mips/pci/
H A Dpcie-octeon.c465 sli_s2m_portx_ctl.u64 = cvmx_read_csr(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port)); __cvmx_pcie_rc_initialize_config_space()
467 cvmx_write_csr(CVMX_PEXP_SLI_S2M_PORTX_CTL(pcie_port), sli_s2m_portx_ctl.u64); __cvmx_pcie_rc_initialize_config_space()

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