Searched refs:CVMX_PEXP_SLI_CTL_PORTX (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/octeon/
H A Dcvmx-pexp-defs.h135 #define CVMX_PEXP_SLI_CTL_PORTX(offset) (CVMX_ADD_IO_SEG(0x00011F0000010050ull) + ((offset) & 3) * 16) macro
/linux-4.1.27/arch/mips/pci/
H A Dpcie-octeon.c1400 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port)); __cvmx_pcie_rc_initialize_gen2()
1405 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(pcie_port), sli_ctl_portx.u64); __cvmx_pcie_rc_initialize_gen2()
2071 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(port)); octeon_pcie_setup()
2076 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(port), sli_ctl_portx.u64); octeon_pcie_setup()
2078 sli_ctl_portx.u64 = cvmx_read_csr(CVMX_PEXP_SLI_CTL_PORTX(!port)); octeon_pcie_setup()
2083 cvmx_write_csr(CVMX_PEXP_SLI_CTL_PORTX(!port), sli_ctl_portx.u64); octeon_pcie_setup()

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