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Searched refs:CVMX_GPIO_BIT_CFGX (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/arch/mips/cavium-octeon/
Docteon-irq.c645 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), cfg.u64); in octeon_irq_gpio_setup()
673 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu_disable_gpio_v2()
683 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu_disable_gpio()
1783 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu2_disable_gpio()
Dsetup.c456 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(12), 1); in octeon_halt()
/linux-4.1.27/arch/mips/include/asm/octeon/
Dcvmx-gpio-defs.h31 #define CVMX_GPIO_BIT_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001070000000800ull) + ((offset) & 15) * 8) macro