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Searched refs:CSR_TIMER1_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/arch/arm/mach-footbridge/
Ddc21285-timer.c53 *CSR_TIMER1_CLR = 0; in ckevt_dc21285_set_next_event()
66 *CSR_TIMER1_CLR = 0; in ckevt_dc21285_set_mode()
94 *CSR_TIMER1_CLR = 0; in timer1_interrupt()
/linux-4.1.27/arch/arm/include/asm/hardware/
Ddec21285.h126 #define CSR_TIMER1_CLR DC21285_IO(0x030c) macro