/linux-4.1.27/include/linux/amba/ |
H A D | pl330.h | 21 * CR0, as the PL330 implementation might have 'holes'
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/linux-4.1.27/include/xen/interface/hvm/ |
H A D | params.h | 78 /* Identity-map page directory used by Intel EPT when CR0.PG=0. */ 87 /* TSS used on Intel when CR0.PE=0. */
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/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/ |
H A D | switch_endian_test.S | 61 * It clobbers r9-r12, XER, CTR and CR0-1,5-7.
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/linux-4.1.27/arch/x86/realmode/rm/ |
H A D | reboot.S | 70 * The instruction that switches to real mode by writing to CR0 must be 152 * semantics we don't have to reload the segments once CR0.PE = 0.
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/linux-4.1.27/arch/x86/kernel/ |
H A D | relocate_kernel_32.S | 29 #define CR0 DATA(0x4) define 54 movl %eax, CR0(%edi) 202 movl CR0(%edi), %eax
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H A D | relocate_kernel_64.S | 31 #define CR0 DATA(0x8) define 64 movq %rax, CR0(%r11) 198 movq CR0(%r8), %r8
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H A D | process_32.c | 105 printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", __show_regs()
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H A D | process_64.c | 101 printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds, __show_regs()
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/linux-4.1.27/arch/x86/include/asm/ |
H A D | fpu-internal.h | 339 * properly paired with the CR0.TS changes! 361 * Encapsulate the CR0.TS handling together with the 427 * sets the new state of the CR0.TS bit. This is 455 /* Don't change CR0.TS if we just switch! */ switch_fpu_prepare() 478 * By the time this gets called, we've already cleared CR0.TS and
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/linux-4.1.27/arch/x86/platform/efi/ |
H A D | efi_stub_32.S | 60 * 3. Clear PG bit in %CR0.
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/linux-4.1.27/arch/x86/boot/ |
H A D | video-mode.c | 132 pt &= ~0x80; /* Unlock CR0-7 */ vga_recalc_vertical()
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H A D | video-vga.c | 146 out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */ vga_set_480_scanlines()
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/linux-4.1.27/include/uapi/asm-generic/ |
H A D | termbits.h | 91 #define CR0 0000000 macro
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/linux-4.1.27/arch/parisc/include/uapi/asm/ |
H A D | termbits.h | 92 #define CR0 0000000 macro
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/linux-4.1.27/arch/avr32/include/uapi/asm/ |
H A D | termbits.h | 91 #define CR0 0000000 macro
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/linux-4.1.27/arch/x86/include/asm/xen/ |
H A D | interface.h | 154 unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */
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/linux-4.1.27/arch/x86/include/uapi/asm/ |
H A D | processor-flags.h | 50 * Basic CPU control in CR0
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/linux-4.1.27/arch/xtensa/include/uapi/asm/ |
H A D | termbits.h | 107 #define CR0 0000000 macro
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/linux-4.1.27/arch/mn10300/include/uapi/asm/ |
H A D | termbits.h | 92 #define CR0 0000000 macro
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/linux-4.1.27/arch/powerpc/include/uapi/asm/ |
H A D | termbits.h | 105 #define CR0 00000000 macro
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/linux-4.1.27/arch/cris/include/uapi/asm/ |
H A D | termbits.h | 93 #define CR0 0000000 macro
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/linux-4.1.27/arch/frv/include/uapi/asm/ |
H A D | termbits.h | 92 #define CR0 0000000 macro
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/linux-4.1.27/arch/ia64/include/uapi/asm/ |
H A D | termbits.h | 100 #define CR0 0000000 macro
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/linux-4.1.27/arch/m32r/include/uapi/asm/ |
H A D | termbits.h | 91 #define CR0 0000000 macro
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/linux-4.1.27/arch/alpha/include/uapi/asm/ |
H A D | termbits.h | 99 #define CR0 00000000 macro
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/linux-4.1.27/drivers/pci/host/ |
H A D | pcie-spear13xx.c | 60 /* CR0 ID */
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/linux-4.1.27/arch/sparc/include/uapi/asm/ |
H A D | termbits.h | 121 #define CR0 0x00000000 macro
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/linux-4.1.27/arch/mips/include/uapi/asm/ |
H A D | termbits.h | 111 #define CR0 0000000 macro
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/linux-4.1.27/arch/arm/kernel/ |
H A D | head-common.S | 140 * Read processor ID register (CP#15, CR0), and look up in the linker-built
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/linux-4.1.27/arch/powerpc/kernel/ |
H A D | head_32.S | 536 mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ 555 mtcrf 0x80,r3 /* Restore CR0 */ 609 mfspr r2,SPRN_SRR1 /* Need to restore CR0 */ 639 mtcrf 0x80,r3 /* Restore CR0 */ 689 mfspr r2,SPRN_SRR1 /* Need to restore CR0 */
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H A D | head_40x.S | 188 * CR saved in stack frame, CR0.EQ = !SRR3.PR
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H A D | entry_64.S | 84 * This clears CR0.SO (bit 28), which is the error indication on
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/linux-4.1.27/drivers/video/fbdev/ |
H A D | sstfb.c | 879 /* the fifth time, CR0 is read */ sst_detect_att() 904 /* the fifth time, CR0 is read */ sst_detect_ti() 977 cr0 = sst_dac_read(DACREG_RMR); /* 5 CR0 */ sst_set_pll_att_ti() 1067 /* the fifth time, CR0 is read */ sst_set_vidmod_att_ti()
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/linux-4.1.27/arch/powerpc/mm/ |
H A D | icswx.c | 267 * using CR0 acop_handle_fault()
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/linux-4.1.27/include/video/ |
H A D | vga.h | 108 #define VGA_CR11_LOCK_CR0_CR7 0x80 /* lock writes to CR0 - CR7 */
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/linux-4.1.27/drivers/dma/ |
H A D | pl330.c | 130 #define CR0 0xe00 macro 1734 val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT; read_dmac_config() 1739 val = readl(regs + CR0); read_dmac_config() 1749 val = readl(regs + CR0); read_dmac_config() 1755 val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT; read_dmac_config()
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/linux-4.1.27/drivers/staging/vt6655/ |
H A D | mac.c | 332 /* restore MAC context, except CR0 */ MACbSafeSoftwareReset()
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/linux-4.1.27/drivers/net/wan/lmc/ |
H A D | lmc_media.c | 935 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */ lmc_t1_init()
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/linux-4.1.27/drivers/net/ethernet/via/ |
H A D | via-velocity.h | 426 * Bits in the CR0 register
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/linux-4.1.27/drivers/spi/ |
H A D | spi-ep93xx.c | 120 /* converts bits per word to CR0.DSS value */
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H A D | spi-pl022.c | 417 * @cr0: Value of control register CR0 of SSP - on later ST variants this 2448 * CR0/CR1 register
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/linux-4.1.27/drivers/net/ethernet/dec/tulip/ |
H A D | uli526x.c | 399 uw32(DCR0, 0); //Clear CR0 uli526x_init_one()
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/linux-4.1.27/arch/x86/kvm/ |
H A D | vmx.c | 1726 * NX is needed to handle CR0.WP=1, CR4.SMEP=1. Testing update_transition_efer() 5300 * We get here when L2 did CLTS, and L1 didn't shadow CR0.TS handle_clts() 9283 * trap. Note that CR0.TS also needs updating - we do this later. prepare_vmcs02() 9491 * to bit 8 (LME) if bit 31 in the CR0 field (corresponding to nested_vmx_run() 9492 * CR0.PG) is 1. nested_vmx_run()
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H A D | svm.c | 221 VMCB_CR, /* CR0, CR3, CR4, EFER */
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H A D | x86.c | 4987 * CR0.TS may reference the host fpu state, not the guest fpu state, emulator_get_fpu()
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/linux-4.1.27/drivers/video/fbdev/sis/ |
H A D | init.c | 3334 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */ SiS_CalcCRRegisters()
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H A D | init301.c | 5225 /* CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 */ SiS_SetGroup1_301()
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/linux-4.1.27/drivers/staging/xgifb/ |
H A D | vb_setmode.c | 654 xgifb_reg_and(pVBInfo->P3d4, 0x11, 0x7F); /* Unlock CR0~7 */ XGI_UpdateXG21CRTC()
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