Searched refs:CPLL_CFG1_CPU_AUX0 (Results 1 – 2 of 2) sorted by relevance
| /linux-4.1.27/arch/mips/include/asm/mach-ralink/ | ||
| D | mt7620.h | 74 #define CPLL_CFG1_CPU_AUX0 BIT(24) macro |
| /linux-4.1.27/arch/mips/ralink/ | ||
| D | mt7620.c | 307 if (reg & CPLL_CFG1_CPU_AUX0) in mt7620_get_pll_rate() |