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Searched refs:CPLL_CFG0_SW_CFG (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-ralink/
Dmt7620.h65 #define CPLL_CFG0_SW_CFG BIT(31) macro
/linux-4.1.27/arch/mips/ralink/
Dmt7620.c281 if ((reg & CPLL_CFG0_SW_CFG) == 0) in mt7620_get_cpu_pll_rate()