Searched refs:CPLL_CFG0_PLL_DIV_RATIO_SHIFT (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-ralink/
H A Dmt7620.h70 #define CPLL_CFG0_PLL_DIV_RATIO_SHIFT 10 macro
/linux-4.1.27/arch/mips/ralink/
H A Dmt7620.c290 div = (reg >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & mt7620_get_cpu_pll_rate()

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