Searched refs:CPLD_SYNC_SEL (Results 1 - 1 of 1) sorted by relevance

/linux-4.1.27/sound/pci/ice1712/
H A Dquartet.c162 #define CPLD_SYNC_SEL GPIO_D3 macro
172 /* internal clock (CPLD_SYNC_SEL = 0) options */
182 /* external clock (CPLD_SYNC_SEL = 1) options */
184 #define CPLD_EXT_SPDIF (0 | CPLD_SYNC_SEL)
186 #define CPLD_EXT_WORDCLOCK_1FS (CPLD_CKS1 | CPLD_SYNC_SEL)
189 CPLD_SYNC_SEL)
842 /* CPLD_SYNC_SEL: 0 = internal, 1 = external (i.e. spdif master) */ qtet_is_spdif_master()
843 return (get_cpld(ice) & CPLD_SYNC_SEL) ? 1 : 0; qtet_is_spdif_master()
877 /* switch to internal clock, drop CPLD_SYNC_SEL */ qtet_set_rate()
878 new &= ~CPLD_SYNC_SEL; qtet_set_rate()
925 val &= (CPLD_CKS_MASK | CPLD_WORD_SEL | CPLD_SYNC_SEL); qtet_get_spdif_master_type()
926 if (!(val & CPLD_SYNC_SEL)) { qtet_get_spdif_master_type()

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