Searched refs:CP0 (Results 1 – 4 of 4) sorted by relevance
78 @ CP0 and CP1 accessible?82 @ enable access to CP0 and CP1212 @ enable access to CP0 and CP1226 @ disable access to CP0 and CP1327 @ CP0 and CP1 accessible?
852 #define CP0 (1 << 0) macro
3913 ref_and_mask = CP0; in cik_hdp_flush_cp_ring_emit()
2042 MIPS CP0 registers (see KVM_REG_MIPS_CP0_* above) have the following id bit