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Searched refs:CORE_CLK_SRC_DPLL (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/arch/arm/mach-omap2/
Dclkt2xxx_dpllcore.c83 if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */ in omap2_dpllcore_round_rate()
124 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_reprogram_dpllcore()
152 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
154 done_rate = CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
Dclkt2xxx_virt_prcm_set.c129 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_select_table_rate()
142 done_rate = CORE_CLK_SRC_DPLL; in omap2_select_table_rate()
Dsdrc2xxx.c91 if (level == CORE_CLK_SRC_DPLL) in omap2xxx_sdrc_reprogram()
Dclock.h164 #define CORE_CLK_SRC_DPLL 0x1 macro