Searched refs:CLK_MUX_HIWORD_MASK (Results 1 – 7 of 7) sorted by relevance
| /linux-4.1.27/drivers/clk/hisilicon/ |
| D | clk-hi3620.c | 112 … uart0_mux_p, ARRAY_SIZE(uart0_mux_p), CLK_SET_RATE_PARENT, 0x100, 7, 1, CLK_MUX_HIWORD_MASK, },
113 … uart1_mux_p, ARRAY_SIZE(uart1_mux_p), CLK_SET_RATE_PARENT, 0x100, 8, 1, CLK_MUX_HIWORD_MASK, },
114 … uart2_mux_p, ARRAY_SIZE(uart2_mux_p), CLK_SET_RATE_PARENT, 0x100, 9, 1, CLK_MUX_HIWORD_MASK, },
115 … uart3_mux_p, ARRAY_SIZE(uart3_mux_p), CLK_SET_RATE_PARENT, 0x100, 10, 1, CLK_MUX_HIWORD_MASK, },
116 … uart4_mux_p, ARRAY_SIZE(uart4_mux_p), CLK_SET_RATE_PARENT, 0x100, 11, 1, CLK_MUX_HIWORD_MASK, },
117 … spi0_mux_p, ARRAY_SIZE(spi0_mux_p), CLK_SET_RATE_PARENT, 0x100, 12, 1, CLK_MUX_HIWORD_MASK, },
118 … spi1_mux_p, ARRAY_SIZE(spi1_mux_p), CLK_SET_RATE_PARENT, 0x100, 13, 1, CLK_MUX_HIWORD_MASK, },
119 … spi2_mux_p, ARRAY_SIZE(spi2_mux_p), CLK_SET_RATE_PARENT, 0x100, 14, 1, CLK_MUX_HIWORD_MASK, },
120 … saxi_mux_p, ARRAY_SIZE(saxi_mux_p), CLK_SET_RATE_PARENT, 0x100, 15, 1, CLK_MUX_HIWORD_MASK, },
121 … pwm0_mux_p, ARRAY_SIZE(pwm0_mux_p), CLK_SET_RATE_PARENT, 0x104, 10, 1, CLK_MUX_HIWORD_MASK, },
[all …]
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| /linux-4.1.27/drivers/clk/ |
| D | clk-mux.c | 89 if (mux->flags & CLK_MUX_HIWORD_MASK) { in clk_mux_set_parent()
126 if (clk_mux_flags & CLK_MUX_HIWORD_MASK) { in clk_register_mux_table()
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| /linux-4.1.27/drivers/clk/ti/ |
| D | mux.c | 87 if (mux->flags & CLK_MUX_HIWORD_MASK) { in ti_clk_mux_set_parent()
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| /linux-4.1.27/include/linux/ |
| D | clk-provider.h | 421 #define CLK_MUX_HIWORD_MASK BIT(2) macro
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| /linux-4.1.27/drivers/clk/rockchip/ |
| D | clk-pll.c | 413 pll_mux->flags |= CLK_MUX_HIWORD_MASK; in rockchip_clk_register_pll()
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| D | clk-rk3188.c | 235 #define MFLAGS CLK_MUX_HIWORD_MASK
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| D | clk-rk3288.c | 223 #define MFLAGS CLK_MUX_HIWORD_MASK
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