Searched refs:CE1_CORE_RESET (Results 1 - 14 of 14) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/include/dt-bindings/reset/
H A Dqcom,gcc-ipq806x.h64 #define CE1_CORE_RESET 47 macro
H A Dqcom,gcc-msm8960.h67 #define CE1_CORE_RESET 50 macro
/linux-4.1.27/drivers/clk/qcom/
H A Dgcc-msm8960.c3210 [CE1_CORE_RESET] = { 0x2724, 7 },
3420 [CE1_CORE_RESET] = { 0x2724, 7 },
H A Dgcc-ipq806x.c2360 [CE1_CORE_RESET] = { 0x2724, 7 },

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