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Searched refs:CACHE_MODE_0 (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/i915/
Di915_suspend.c119 dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0); in i915_save_state()
153 I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 | in i915_restore_state()
Dintel_pm.c5888 I915_WRITE(CACHE_MODE_0, in ironlake_init_clock_gating()
5892 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in ironlake_init_clock_gating()
5963 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in gen6_init_clock_gating()
5978 I915_WRITE(CACHE_MODE_0, in gen6_init_clock_gating()
6424 I915_WRITE(CACHE_MODE_0, in g4x_init_clock_gating()
6428 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in g4x_init_clock_gating()
6446 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in crestline_init_clock_gating()
6463 I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE)); in broadwater_init_clock_gating()
Dintel_ringbuffer.c1094 I915_WRITE(CACHE_MODE_0, in init_render_ring()
Di915_reg.h1504 #define CACHE_MODE_0 0x02120 /* 915+ only */ macro