/linux-4.1.27/arch/m68k/include/asm/ |
H A D | mcfwdebug.h | 28 #define MCFDEBUG_TDR_TRC_HALT 0x40000000 /* Processor halt on BP */ 29 #define MCFDEBUG_TDR_TRC_INTR 0x80000000 /* Debug intr on BP */ 34 #define MCFDEBUG_TDR_EDLW1 0x00001000 /* Enable data BP longword */ 36 #define MCFDEBUG_TDR_EDWL1 0x00000800 /* Enable data BP lower word */ 38 #define MCFDEBUG_TDR_EDWU1 0x00000400 /* Enable data BP upper word */ 40 #define MCFDEBUG_TDR_EDLL1 0x00000200 /* Enable data BP low low byte */ 42 #define MCFDEBUG_TDR_EDLM1 0x00000100 /* Enable data BP low mid byte */ 44 #define MCFDEBUG_TDR_EDUM1 0x00000080 /* Enable data BP up mid byte */ 46 #define MCFDEBUG_TDR_EDUU1 0x00000040 /* Enable data BP up up byte */ 48 #define MCFDEBUG_TDR_DI1 0x00000020 /* Data BP invert */ 50 #define MCFDEBUG_TDR_EAI1 0x00000010 /* Enable address BP inverted */ 52 #define MCFDEBUG_TDR_EAR1 0x00000008 /* Enable address BP range */ 54 #define MCFDEBUG_TDR_EAL1 0x00000004 /* Enable address BP low */ 56 #define MCFDEBUG_TDR_EPC1 0x00000002 /* Enable PC BP */ 58 #define MCFDEBUG_TDR_PCI1 0x00000001 /* PC BP invert */
|
/linux-4.1.27/arch/avr32/include/asm/ |
H A D | ocd.h | 15 * BP Breakpoint 35 #define OCD_BWC0A 0x0058 /* PC BP/WP Control 0A */ 36 #define OCD_BWC0B 0x005c /* PC BP/WP Control 0B */ 37 #define OCD_BWC1A 0x0060 /* PC BP/WP Control 1A */ 38 #define OCD_BWC1B 0x0064 /* PC BP/WP Control 1B */ 39 #define OCD_BWC2A 0x0068 /* PC BP/WP Control 2A */ 40 #define OCD_BWC2B 0x006c /* PC BP/WP Control 2B */ 41 #define OCD_BWC3A 0x0070 /* Data BP/WP Control 3A */ 42 #define OCD_BWC3B 0x0074 /* Data BP/WP Control 3B */ 43 #define OCD_BWA0A 0x0078 /* PC BP/WP Address 0A */ 44 #define OCD_BWA0B 0x007c /* PC BP/WP Address 0B */ 45 #define OCD_BWA1A 0x0080 /* PC BP/WP Address 1A */ 46 #define OCD_BWA1B 0x0084 /* PC BP/WP Address 1B */ 47 #define OCD_BWA2A 0x0088 /* PC BP/WP Address 2A */ 48 #define OCD_BWA2B 0x008c /* PC BP/WP Address 2B */ 49 #define OCD_BWA3A 0x0090 /* Data BP/WP Address 3A */ 50 #define OCD_BWA3B 0x0094 /* Data BP/WP Address 3B */
|
/linux-4.1.27/tools/perf/arch/x86/util/ |
H A D | unwind-libdw.c | 24 dwarf_regs[5] = REG(BP); libdw__arch_set_initial_registers() 36 dwarf_regs[6] = REG(BP); libdw__arch_set_initial_registers()
|
/linux-4.1.27/tools/perf/arch/x86/tests/ |
H A D | regs_load.S | 9 #define BP 6 * 8 define 37 movq %rbp, BP(%rdi) 74 movl %ebp, BP(%edi)
|
/linux-4.1.27/arch/arm/mach-dove/ |
H A D | dove-db-setup.c | 4 * Marvell DB-MV88AP510-BP Development Board Setup 95 MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
|
H A D | cm-a510.c | 7 * Based on Marvell DB-MV88AP510-BP Development Board Setup
|
/linux-4.1.27/arch/arm/mach-mv78xx0/ |
H A D | db78x00-bp-setup.c | 4 * Marvell DB-78x00-BP Development Board Setup 94 MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
|
/linux-4.1.27/drivers/ide/ |
H A D | pdc202xx_old.c | 30 u8 AP = 0, BP = 0, CP = 0; pdc202xx_set_mode() local 34 pci_read_config_byte(dev, drive_pci + 1, &BP); pdc202xx_set_mode() 66 BP &= ~0x1f; pdc202xx_set_mode() 68 pci_write_config_byte(dev, drive_pci + 1, BP | TB); pdc202xx_set_mode() 71 BP &= ~0xe0; pdc202xx_set_mode() 74 pci_write_config_byte(dev, drive_pci + 1, BP | TB); pdc202xx_set_mode()
|
/linux-4.1.27/kernel/debug/kdb/ |
H A D | kdb_bp.c | 110 if (KDB_DEBUG(BP)) kdb_handle_bp() 132 if (KDB_DEBUG(BP)) _kdb_bp_install() 140 if (KDB_DEBUG(BP)) _kdb_bp_install() 183 if (KDB_DEBUG(BP)) { kdb_bp_install() 214 if (KDB_DEBUG(BP)) { kdb_bp_remove() 243 kdb_printf("BP #%d at ", i); kdb_printbp()
|
/linux-4.1.27/arch/cris/include/arch-v32/arch/ |
H A D | ptrace.h | 32 #define PT_BP 26 /* Base number for BP registers. */ 33 #define PT_BP_CTRL 26 /* BP control register. */
|
/linux-4.1.27/tools/perf/arch/x86/include/ |
H A D | perf_regs.h | 42 return "BP"; perf_reg_name()
|
/linux-4.1.27/drivers/sbus/char/ |
H A D | bbc_i2c.c | 65 #define claim_device(BP,ECHILD) set_device_claimage(BP,ECHILD,1) 66 #define release_device(BP,ECHILD) set_device_claimage(BP,ECHILD,0)
|
/linux-4.1.27/arch/cris/arch-v32/kernel/ |
H A D | kgdb.c | 892 /* Dx_RD, Dx_WR in the S field of EXS for this BP. */ stub_is_stopped() 894 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */ stub_is_stopped() 897 /* Get read/write trig bits for this BP. */ stub_is_stopped() 900 /* Read/write config bits for this BP. */ stub_is_stopped() 903 /* Sanity check: the BP shouldn't trigger for accesses stub_is_stopped() 907 panic("Invalid r/w trigging for this BP"); stub_is_stopped() 909 /* Mark this BP as trigged for future reference. */ stub_is_stopped() 914 /* EDA within range for this BP; it must be the one stub_is_stopped() 922 /* Found a trigged BP with EDA within its configured data range. */ stub_is_stopped() 924 /* Something triggered, but EDA doesn't match any BP's range. */ stub_is_stopped() 926 /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */ stub_is_stopped() 929 /* Read/write config bits for this BP (needed later). */ stub_is_stopped() 936 the start address of the first applicable BP. */ stub_is_stopped() 940 /* We continue since we might find another useful BP. */ stub_is_stopped() 941 printk("EDA doesn't match trigged BP's range"); stub_is_stopped() 949 /* Note that we report the type according to what the BP is configured stub_is_stopped() 951 it trigged. We did check that the trigged bits match what the BP is stub_is_stopped() 966 panic("Invalid r/w bits for this BP."); stub_is_stopped() 1235 /* Read/write bits for this BP. */ remove_watchpoint()
|
H A D | ptrace.c | 381 /* Switch to BP bank. */ put_debugreg() 442 /* Switch to BP bank. */ get_debugreg()
|
/linux-4.1.27/arch/x86/include/asm/ |
H A D | mpspec_def.h | 61 #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
|
/linux-4.1.27/arch/x86/include/uapi/asm/ |
H A D | svm.h | 99 { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \
|
/linux-4.1.27/drivers/staging/iio/magnetometer/ |
H A D | hmc5843_core.c | 183 * configuration the device follows normal measurement flow. Pins BP 187 * positive current is forced across the resistive load on pins BP 191 * negative current is forced across the resistive load on pins BP
|
/linux-4.1.27/drivers/net/ethernet/broadcom/ |
H A D | b44.c | 74 #define TX_RING_GAP(BP) \ 75 (B44_TX_RING_SIZE - (BP)->tx_pending) 76 #define TX_BUFFS_AVAIL(BP) \ 77 (((BP)->tx_cons <= (BP)->tx_prod) ? \ 78 (BP)->tx_cons + (BP)->tx_pending - (BP)->tx_prod : \ 79 (BP)->tx_cons - (BP)->tx_prod - TX_RING_GAP(BP))
|
/linux-4.1.27/drivers/uwb/ |
H A D | drp-avail.c | 47 * slots are used for the BP (it may change in size). 263 * The notification only marks non-availability based on the BP and
|
H A D | drp.c | 614 * We have received an DRP_IE of type Alien BP and we need to make 628 /* Existing alien BP reservation conflicting uwb_drp_handle_alien_drp() 635 /* New alien BP reservation conflicting bitmap */ uwb_drp_handle_alien_drp()
|
H A D | beacon.c | 513 dev_err(dev, "BP SLOT CHANGE event: Not enough data\n"); uwbd_evt_handle_rc_bp_slot_change() 519 dev_err(dev, "stopped beaconing: No free slots in BP\n"); uwbd_evt_handle_rc_bp_slot_change()
|
H A D | hwa-rc.c | 490 * WHCI interprets the BP Slot Change event's data differently than
|
/linux-4.1.27/arch/mn10300/kernel/ |
H A D | head.S | 48 # We're dealing with the primary CPU (BP) here, then. 49 # Keep BP's D0,D1,D2 register for boot check.
|
/linux-4.1.27/arch/arm/mach-pxa/ |
H A D | tavorevb.c | 256 SMART_CMD(0x08), /* BP, FP Seting, BP=2H, FP=3H */
|
/linux-4.1.27/arch/x86/um/ |
H A D | signal.c | 176 GETREG(BP, bp); copy_sc_from_user() 265 PUTREG(BP, bp); copy_sc_to_user()
|
/linux-4.1.27/include/linux/uwb/ |
H A D | spec.h | 696 /* BP Switch IE Received notification. [WHCI] section 3.1.4.6. */ 731 /* BP switch status notification. [WHCI] section 3.1.4.10. */
|
/linux-4.1.27/drivers/hwmon/ |
H A D | mc13783-adc.c | 88 * BP (channel 2) reports with offset 2.4V to the actual value mc13783_adc_read_bp()
|
/linux-4.1.27/lib/mpi/ |
H A D | mpi-pow.c | 96 * at BP + MSIZE. */ mpi_powm()
|
/linux-4.1.27/kernel/debug/ |
H A D | debug_core.c | 262 pr_info("BP install failed: %lx\n", dbg_activate_sw_breakpoints() 325 pr_info("BP remove failed: %lx\n", dbg_deactivate_sw_breakpoints()
|
/linux-4.1.27/drivers/misc/eeprom/ |
H A D | at25.c | 48 #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
|
/linux-4.1.27/drivers/gpu/drm/gma500/ |
H A D | psb_drv.h | 774 /* debug the get H/V BP/FP count */
|
/linux-4.1.27/arch/x86/kernel/cpu/mtrr/ |
H A D | generic.c | 421 /* PAT setup for BP. We need to go through sync steps here */ get_mtrr_state()
|
/linux-4.1.27/arch/x86/kvm/ |
H A D | trace.h | 251 EXS(DE), EXS(DB), EXS(BP), EXS(OF), EXS(BR), EXS(UD), EXS(NM), \
|
H A D | svm.c | 551 * For guest debugging where we have to reinject #BP if some svm_queue_exception()
|
H A D | vmx.c | 5168 * Update instruction length as we may reinject #BP from handle_exception()
|
/linux-4.1.27/drivers/gpu/drm/radeon/ |
H A D | radeon_uvd.c | 354 /* BP */ radeon_uvd_cs_msg_decode()
|
/linux-4.1.27/arch/ia64/kernel/ |
H A D | smpboot.c | 404 * Synchronize the ITC with the BP. Need to do this after irqs are smp_callin()
|
H A D | head.S | 315 (isBP) br.cond.dpnt .load_current // BP stack is on region 5 --- no need to map it
|
/linux-4.1.27/arch/arm/mm/ |
H A D | proc-v7.S | 289 #define PJ4B_STATIC_BP (1 << 2) /* Enable Static BP */
|
/linux-4.1.27/drivers/gpu/drm/ |
H A D | drm_modes.c | 450 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ drm_gtf_mode_complex()
|
/linux-4.1.27/arch/blackfin/mach-common/ |
H A D | entry.S | 62 if cc jump _ex_dcplb_miss (BP); 66 if cc jump _ex_dcplb_viol (BP);
|
/linux-4.1.27/sound/soc/sh/ |
H A D | fsi.c | 105 #define BP (1 << 4) /* Fix the signal of Biphase output */ macro 721 mask = BP | SE; fsi_spdif_clk_ctrl()
|
/linux-4.1.27/arch/x86/kernel/apic/ |
H A D | apic.c | 1359 * set up through-local-APIC on the BP's LINT0. This is not setup_local_APIC() 1377 * only the BP should see the LINT1 NMI signal, obviously. setup_local_APIC()
|
/linux-4.1.27/drivers/net/ethernet/agere/ |
H A D | et131x.h | 911 * 18: BP no backoff
|
/linux-4.1.27/drivers/misc/ |
H A D | kgdbts.c | 328 eprintk("kgdbts: BP mismatch %lx expected %lx\n", check_and_rewind_pc()
|
/linux-4.1.27/arch/x86/kernel/cpu/ |
H A D | common.c | 732 * WARNING: this function is only called on the BP. Don't add code here
|
H A D | perf_event_intel_ds.c | 907 * In the simple case fix up only the IP and BP,SP regs, for __intel_pmu_pebs_event()
|
/linux-4.1.27/arch/x86/kernel/ |
H A D | setup.c | 1033 * needs to be done after dmi_scan_machine, for the BP. setup_arch()
|
H A D | smpboot.c | 238 * Check TSC synchronization with the BP: start_secondary()
|
H A D | uprobes.c | 414 * BP is stack-segment based (may be a problem?). riprel_analyze()
|
/linux-4.1.27/arch/blackfin/kernel/ |
H A D | trace.c | 335 pr_cont("IF %sCC JUMP pcrel %s", T ? "" : "!", B ? "(BP)" : ""); decode_BRCC_0()
|
/linux-4.1.27/drivers/net/ethernet/broadcom/genet/ |
H A D | bcmgenet.c | 3042 "BP << en: %2d, BP msk: 0x%05x\n" bcmgenet_set_hw_params()
|
/linux-4.1.27/arch/mips/kvm/ |
H A D | emulate.c | 2142 kvm_debug("Delivering BP @ pc %#lx\n", arch->pc); kvm_mips_emulate_bp_exc() 2151 kvm_err("Trying to deliver BP when EXL is already set\n"); kvm_mips_emulate_bp_exc()
|
/linux-4.1.27/drivers/media/platform/coda/ |
H A D | coda-bit.c | 563 /* Only H.264BP and H.263P3 are considered */ coda_setup_iram()
|
/linux-4.1.27/drivers/net/wireless/ |
H A D | adm8211.c | 1273 /* BP (beacon interval) = data->beacon_interval adm8211_set_interval()
|
/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_link.c | 13561 * the advertised BP/NP after ~2 seconds causing the KR2 to be disabled bnx2x_check_kr2_wa() 13591 DP(NETIF_MSG_LINK, "No BP\n"); bnx2x_check_kr2_wa() 13607 DP(NETIF_MSG_LINK, "BP=0x%x, NP=0x%x\n", base_page, bnx2x_check_kr2_wa() 13616 DP(NETIF_MSG_LINK, "BP=0x%x, NP=0x%x\n", base_page, next_page); bnx2x_check_kr2_wa()
|
H A D | bnx2x_main.c | 2897 /* notify link down because BP->flags is disabled */ bnx2x_handle_afex_cmd()
|