Searched refs:BBbWriteEmbedded (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/drivers/staging/vt6655/
H A Dbaseband.h64 BBbWriteEmbedded(dwIoBase, 0xB1, 0)
67 BBbWriteEmbedded(dwIoBase, 0xB1, 0x0C)
81 bool BBbWriteEmbedded(struct vnt_private *, unsigned char byBBAddr, unsigned char byData);
H A Dbaseband.c33 * BBbWriteEmbedded - Embedded write baseband register via MAC
1969 bool BBbWriteEmbedded(struct vnt_private *priv, BBbWriteEmbedded() function
2024 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2030 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2035 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2052 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2057 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2070 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2075 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2092 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2097 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ BBbVT3253Init()
2099 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ BBbVT3253Init()
2101 bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06); BBbVT3253Init()
2104 bResult &= BBbWriteEmbedded(priv, 0x90, 0x20); BBbVT3253Init()
2105 bResult &= BBbWriteEmbedded(priv, 0x97, 0xeb); BBbVT3253Init()
2109 bResult &= BBbWriteEmbedded(priv, 0xa6, 0x00); BBbVT3253Init()
2110 bResult &= BBbWriteEmbedded(priv, 0xa8, 0x30); BBbVT3253Init()
2112 bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58); BBbVT3253Init()
2115 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2130 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2135 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2151 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2158 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ BBbVT3253Init()
2160 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ BBbVT3253Init()
2162 bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06); BBbVT3253Init()
2166 bResult &= BBbWriteEmbedded(priv, BBbVT3253Init()
2185 BBbWriteEmbedded(priv, 0x04, 0x7F); BBbVT3253Init()
2186 BBbWriteEmbedded(priv, 0x0D, 0x01); BBbVT3253Init()
2222 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */ BBvSetShortSlotTime()
2229 BBbWriteEmbedded(priv, 0xE7, byData); BBvSetVGAGainOffset()
2240 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */ BBvSetVGAGainOffset()
2258 BBbWriteEmbedded(priv, 0x50, 0x40); BBvSoftwareReset()
2259 BBbWriteEmbedded(priv, 0x50, 0); BBvSoftwareReset()
2260 BBbWriteEmbedded(priv, 0x9C, 0x01); BBvSoftwareReset()
2261 BBbWriteEmbedded(priv, 0x9C, 0); BBvSoftwareReset()
2283 BBbWriteEmbedded(priv, 0x0D, byOrgData); BBvPowerSaveModeON()
2305 BBbWriteEmbedded(priv, 0x0D, byOrgData); BBvPowerSaveModeOFF()
2338 BBbWriteEmbedded(priv, 0x09, byBBTxConf); /* CR09 */ BBvSetTxAntennaMode()
2370 BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */ BBvSetRxAntennaMode()
2388 BBbWriteEmbedded(priv, 0x0C, 0x17); /* CR12 */ BBvSetDeepSleep()
2389 BBbWriteEmbedded(priv, 0x0D, 0xB9); /* CR13 */ BBvSetDeepSleep()
2395 BBbWriteEmbedded(priv, 0x0C, 0x00); /* CR12 */ BBvExitDeepSleep()
2396 BBbWriteEmbedded(priv, 0x0D, 0x01); /* CR13 */ BBvExitDeepSleep()
H A Dcard.c225 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
232 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
233 BBbWriteEmbedded(pDevice, 0xE1, 0x57); CARDbSetPhyParameter()
238 BBbWriteEmbedded(pDevice, 0x88, 0x03); CARDbSetPhyParameter()
251 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
257 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
258 BBbWriteEmbedded(pDevice, 0xE1, 0xD3); CARDbSetPhyParameter()
261 BBbWriteEmbedded(pDevice, 0x88, 0x02); CARDbSetPhyParameter()
274 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
280 BBbWriteEmbedded(pDevice, 0xE7, pDevice->abyBBVGA[0]); CARDbSetPhyParameter()
281 BBbWriteEmbedded(pDevice, 0xE1, 0xD3); CARDbSetPhyParameter()
284 BBbWriteEmbedded(pDevice, 0x88, 0x08); CARDbSetPhyParameter()

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