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/linux-4.1.27/arch/c6x/lib/
H A D	remu.S	22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4 25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4 43 mv .s2x A4, B1 44 lmbd .l2 1, B4, B1 45 \|\| [!B1] b .s2 B3 ; RETURN A 46 \|\| [!B1] mvk .d2 1, B4 48 mv .l1x B1, A7 49 \|\| shl .s2 B4, B1, B4 56 cmpgt .l2 B1, 7, B0 57 \|\| [B1] subc .l1x A4,B4,A4 58 \|\| [B1] add .s2 -1, B1, B1 60 [B1] subc .l1x A4,B4,A4 61 \|\| [B1] add .s2 -1, B1, B1 63 [B1] subc .l1x A4,B4,A4 64 \|\| [B1] add .s2 -1, B1, B1 65 [B1] subc .l1x A4,B4,A4 66 \|\| [B1] add .s2 -1, B1, B1 67 [B1] subc .l1x A4,B4,A4 68 \|\| [B1] add .s2 -1, B1, B1 69 [B1] subc .l1x A4,B4,A4 70 \|\| [B1] add .s2 -1, B1, B1 71 [B1] subc .l1x A4,B4,A4 72 \|\| [B1] add .s2 -1, B1, B1 76 [B1] subc .l1x A4,B4,A4 77 \|\| [B1] add .s2 -1, B1, B1 78 [B1] subc .l1x A4,B4,A4
H A D	divu.S	22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4 25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4 49 mv .s2x A4, B1 50 [B1] lmbd .l2 1, B4, B1 51 \|\| [!B1] b .s2 B3 ; RETURN A 52 \|\| [!B1] mvk .d2 1, B4 53 mv .l1x B1, A6 54 \|\| shl .s2 B4, B1, B4 64 \|\| [B1] subc .l1x A4,B4,A4 65 \|\| [B1] add .s2 -1, B1, B1 66 [B1] subc .l1x A4,B4,A4 67 \|\| [B1] add .s2 -1, B1, B1 71 cmpgt .l2 B1, 7, B0 72 \|\| [B1] subc .l1x A4,B4,A4 73 \|\| [B1] add .s2 -1, B1, B1 74 [B1] subc .l1x A4,B4,A4 75 \|\| [B1] add .s2 -1, B1, B1 77 [B1] subc .l1x A4,B4,A4 78 \|\| [B1] add .s2 -1, B1, B1 79 [B1] subc .l1x A4,B4,A4 80 \|\| [B1] add .s2 -1, B1, B1 81 [B1] subc .l1x A4,B4,A4 82 \|\| [B1] add .s2 -1, B1, B1 83 [B1] subc .l1x A4,B4,A4 84 \|\| [B1] add .s2 -1, B1, B1 85 [B1] subc .l1x A4,B4,A4 86 \|\| [B1] add .s2 -1, B1, B1
H A D	divremu.S	`34 mv .s2x A4, B1 36 [b1] lmbd .l2 1, B4, B1 41 mv .l1x B1, A6 42 \|\| shl .s2 B4, B1, B4 53 \|\| [b1] add .s2 -1, B1, B1 55 \|\| [b1] add .s2 -1, B1, B1 59 cmpgt .l2 B1, 7, B0 61 \|\| [b1] add .s2 -1, B1, B1 63 \|\| [b1] add .s2 -1, B1, B1 66 \|\| [b1] add .s2 -1, B1, B1 68 \|\| [b1] add .s2 -1, B1, B1 70 \|\| [b1] add .s2 -1, B1, B1 72 \|\| [b1] add .s2 -1, B1, B1 74 \|\| [b1] add .s2 -1, B1, B1`
H A D	divi.S	`22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4 25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4 42 \|\| cmpgt .l2 0, B4, B1 45 \|\| [B1] neg .l2 B4, B4 46 \|\| xor .s1x A1, B1, A1`
H A D	remi.S	`22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4 25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4`
H A D	strasgi.S	`26 \|\| mvk .s2 16, B1 46 \|\| cmpltu .l2 B1, B6, B0 75 cmpltu .l2 B1, B6, B0`
H A D	csum_64plus.S	`193 CMPGT .L2 B0,0,B1 194 [!B1] BNOP .S1 L15,4 195 [!B1] ZERO .D1 A3`
/linux-4.1.27/arch/c6x/kernel/
H A D	switch_to.S	`24 \|\| MVC .S2 RILC,B1 34 \|\| STDW .D2T2 B1:B0,+B5(THREAD_RICL_ICL) 36 \|\| MVKL .S2 current_ksp,B1 42 \|\| MVKH .S2 current_ksp,B1 50 \|\| STW .D2T2 B7,B1 71 \|\| MV .L2X A1,B1 73 MVC .S2 B1,RILC`
H A D	entry.S	54 LDW .D2T2 B0,B1 ; KSP 57 STW .D2T2 B1,+SP[1] ; save original B1 58 XOR .D2 SP,B1,B0 ; (SP ^ KSP) 59 LDW .D2T2 +SP[1],B1 ; restore B0/B1 62 [B0] STDW .D2T2 SP:DP,--B1[1] ; user: save user sp/dp kstack 63 [B0] MV .S2 B1,SP ; and switch to kstack 93 STDW .D2T2 B1:B0,SP--[1] 123 MVK .L2 0,B1 124 STW .D2T2 B1,+SP(REGS__END+8) ; clear syscall flag 152 \|\| LDDW .D2T2 ++SP[1],B1:B0 220 \|\| MVK .S2 __NR_syscalls,B1 221 CMPLTU .L2 B0,B1,B1 223 [!B1] BNOP .S2 ret_from_syscall_function,5 229 \|\| MVKL .S2 sys_call_table,B1 231 \|\| MVKH .S2 sys_call_table,B1 232 LDW .D2T2 +B1[B0],B0 248 MVC .S2 CSR,B1 249 SET .S2 B1,0,0,B1 250 MVC .S2 B1,CSR ; enable ints 302 MVK .S2 0x40,B1 304 AND .D2 B0,B1,B0 335 MVK .S2 __NR_syscalls,B1 339 CMPLTU .L2 B0,B1,B1 348 [!B1] B .S2X A0 350 [!B1] B .S2 sys_ni_syscall 352 [!B1] ADDKPC .S2 ret_from_syscall_function,B3,4 357 \|\| MVKL .S2 sys_call_table,B1 358 MVKH .S2 sys_call_table,B1 359 LDW .D2T2 *+B1[B0],B0 522 \|\| MVC .S2 TSR,B1 523 CLR .S2 B1,10,10,B1 524 MVC .S2 B1,TSR 533 [!B2] ADDAW .D2 SP,2,B1 534 [!B2] MV .D1X B1,A4 594 MVK .L2 0xc,B1 595 OR .D2 B0,B1,B0
H A D	head.S	`38 CMPLT .L2 B0,0,B1 39 [!B1] STDW .D2T2 B13:B12,*B5++[1]`
H A D	traps.c	`38 pr_err("A1: %08lx B1: %08lx\n", regs->a1, regs->b1); show_regs()`
/linux-4.1.27/arch/blackfin/kernel/cplb-mpu/
H A D	Makefile	`10 -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3`
/linux-4.1.27/arch/blackfin/kernel/cplb-nompu/
H A D	Makefile	`10 -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3`
/linux-4.1.27/arch/arm/mach-pxa/include/mach/
H A D	hardware.h	`67 * PXA210 B1 0x69052923 0x3926C013 74 * PXA250 B1 0x69052903 0x39264013 86 * PXA27x B1 0x69054113 0x39265013 95 * PXA32x B1 0x69056825 0x5E642013 99 * PXA930 B1 0x69056837 0x7E643013 104 * PXA935 B1 0x56056938 0x8E653013`
/linux-4.1.27/drivers/isdn/hardware/avm/
H A D	b1pci.c	3 * Module for AVM B1 PCI-card. 40 MODULE_DESCRIPTION("CAPI4Linux: Driver for AVM B1 PCI card"); 126 printk(KERN_INFO "b1pci: AVM B1 PCI V4 at i/o %#x, irq %d, revision %d (no dma)\n", b1pci_probe() 129 printk(KERN_INFO "b1pci: AVM B1 PCI at i/o %#x, irq %d, revision %d\n", b1pci_probe() 264 printk(KERN_INFO "b1pci: AVM B1 PCI V4 at i/o %#x, irq %d, mem %#lx, revision %d (dma)\n", b1pciv4_probe() 309 printk(KERN_ERR "b1pci: failed to enable AVM-B1\n"); b1pci_pci_probe() 314 if (pci_resource_start(pdev, 2)) { /* B1 PCI V4 */ b1pci_pci_probe() 321 printk(KERN_INFO "b1pci: PCI BIOS reports AVM-B1 V4 at i/o %#x, irq %d, mem %#x\n", b1pci_pci_probe() 329 printk(KERN_ERR "b1pci: no AVM-B1 V4 at i/o %#x, irq %d, mem %#x detected\n", b1pci_pci_probe() 336 printk(KERN_INFO "b1pci: PCI BIOS reports AVM-B1 at i/o %#x, irq %d\n", b1pci_pci_probe() 340 printk(KERN_ERR "b1pci: no AVM-B1 at i/o %#x, irq %d detected\n", b1pci_pci_probe()
H A D	avm_cs.c	`3 * A PCMCIA client driver for AVM B1/M1/M2 34 MODULE_DESCRIPTION("CAPI4Linux: PCMCIA client driver for AVM B1/M1/M2"); 152 PCMCIA_DEVICE_PROD_ID12("AVM", "ISDN-Controller B1", 0x95d42008, 0x845dc335),`
H A D	b1isa.c	`3 * Module for AVM B1 ISA-card. 34 MODULE_DESCRIPTION("CAPI4Linux: Driver for AVM B1 ISA card"); 133 printk(KERN_INFO "b1isa: AVM B1 ISA at i/o %#x, irq %d, revision %d\n", b1isa_probe()`
H A D	b1pcmcia.c	`3 * Module for AVM B1/M1/M2 PCMCIA-card. 122 default: cardname = "B1 PCMCIA"; break; b1pcmcia_add_card()`
H A D	b1.c	`3 * Common module for AVM B1 cards. 450 else strcpy(cinfo->cardname, "B1"); b1_parse_version() 455 case 6: strcpy(cinfo->cardname, "B1 V3.0"); break; b1_parse_version() 456 case 7: strcpy(cinfo->cardname, "B1 PCI"); break; b1_parse_version() 652 case avm_b1isa: s = "B1 ISA"; break; b1ctl_proc_show() 653 case avm_b1pci: s = "B1 PCI"; break; b1ctl_proc_show() 654 case avm_b1pcmcia: s = "B1 PCMCIA"; break; b1ctl_proc_show()`
H A D	b1dma.c	`3 * Common module for AVM B1 cards that support dma with AMCC 876 case avm_b1isa: s = "B1 ISA"; break; b1dmactl_proc_show() 877 case avm_b1pci: s = "B1 PCI"; break; b1dmactl_proc_show() 878 case avm_b1pcmcia: s = "B1 PCMCIA"; break; b1dmactl_proc_show()`
H A D	c4.c	`1081 case avm_b1isa: s = "B1 ISA"; break; c4_proc_show() 1082 case avm_b1pci: s = "B1 PCI"; break; c4_proc_show() 1083 case avm_b1pcmcia: s = "B1 PCMCIA"; break; c4_proc_show()`
/linux-4.1.27/drivers/media/usb/dvb-usb/
H A D	digitv.h	`20 * <cmdbyte> VV <len> B0 B1 B2 B3`
/linux-4.1.27/arch/arm/mach-orion5x/
H A D	dns323-setup.c	41 /* Rev A1 and B1 / 97 / Rev B1 and C1 doesn't really use its PCI bus, and initialising PCI dns323_pci_init() 458 * On the DNS-323 A1 and B1 the following devices are attached via I2C: 533 pr_debug("DNS-323: 5182 found, board is B1 or C1, checking PHY...\n"); dns323_identify_rev() 535 /* Rev B1 and C1 both have 5182, let's poke at the eth PHY. This is dns323_identify_rev() 537 * driver so let's poke at it directly. We default to rev B1 in dns323_identify_rev() 553 pr_warn("DNS-323: Timeout accessing PHY, assuming rev B1\n"); dns323_identify_rev() 565 pr_warn("DNS-323: Timeout reading PHY, assuming rev B1\n"); dns323_identify_rev() 580 pr_warn("DNS-323: Unknown PHY ID 0x%04x, assuming rev B1\n", dns323_identify_rev() 678 /* The DNS323 rev B1 has flag to indicate the system is up. dns323_init() 706 * Note: AFAIK, rev B1 needs the same treatement but I'll let dns323_init()
H A D	common.c	`297 *dev_name = "MV88F5181-Rev-B1"; orion5x_id()`
/linux-4.1.27/drivers/isdn/hisax/
H A D	st5481.h	28 #define EP_B1_OUT 0x02U /* B1 channel out / 29 #define EP_B1_IN 0x03U / B1 channel in / 65 #define IN_B1_COUNTER 0x38 / B1 receive channel fifo counter / 66 #define OUT_B1_COUNTER 0x39 / B1 transmit channel fifo counter / 73 #define FFCTRL_IN_B1 0x40 / B1 receive channel fifo threshold low / 74 #define FFCTRH_IN_B1 0x41 / B1 receive channel fifo threshold high / 75 #define FFCTRL_OUT_B1 0x42 / B1 transmit channel fifo threshold low / 76 #define FFCTRH_OUT_B1 0x43 / B1 transmit channel fifo threshold high / 83 #define FFMSK_B1 0x4e / B1 fifo interrupt MASK register */
H A D	hfc_usb.h	`53 #define HFCUSB_B1_TX 0 /* index for B1 transmit bulk/int / 54 #define HFCUSB_B1_RX 1 / index for B1 receive bulk/int */`
H A D	hfc_sx.c	400 /* STIO1 is used as output for data, B1+B2 from ST->IOM+HFC / reset_hfcsx() 401 / STIO2 is used as data input, B1+B2 from IOM->ST / reset_hfcsx() 406 Write_hfc(cs, HFCSX_B1_SSL, 0x80); / B1-Slot 0 STIO1 out enabled / reset_hfcsx() 408 Write_hfc(cs, HFCSX_B1_RSL, 0x80); / B1-Slot 0 STIO2 in enabled / reset_hfcsx() 575 debugl1(cs, "PH_TEST_LOOP B1"); dch_nt_l2l1() 1043 cs->hw.hfcsx.bswapped = 0; / B1 and B2 normal mode / mode_hfcsx() 1048 cs->hw.hfcsx.bswapped = 1; / B1 and B2 exchanged / mode_hfcsx() 1051 cs->hw.hfcsx.bswapped = 0; / B1 and B2 normal mode / mode_hfcsx() 1056 cs->hw.hfcsx.bswapped = 0; / B1 and B2 normal mode */ mode_hfcsx()
H A D	hfc_pci.c	147 /* STIO1 is used as output for data, B1+B2 from ST->IOM+HFC / reset_hfcpci() 148 / STIO2 is used as data input, B1+B2 from IOM->ST / reset_hfcpci() 153 Write_hfc(cs, HFCPCI_B1_SSL, 0x80); / B1-Slot 0 STIO1 out enabled / reset_hfcpci() 155 Write_hfc(cs, HFCPCI_B1_RSL, 0x80); / B1-Slot 0 STIO2 in enabled / reset_hfcpci() 749 debugl1(cs, "PH_TEST_LOOP B1"); dch_nt_l2l1() 1280 cs->hw.hfcpci.bswapped = 0; / B1 and B2 normal mode / mode_hfcpci() 1285 cs->hw.hfcpci.bswapped = 1; / B1 and B2 exchanged / mode_hfcpci() 1288 cs->hw.hfcpci.bswapped = 0; / B1 and B2 normal mode / mode_hfcpci() 1293 cs->hw.hfcpci.bswapped = 0; / B1 and B2 normal mode */ mode_hfcpci()
H A D	ipacx.c	`163 cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1 dch_l2l1() 164 cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1 dch_l2l1() 167 if ((long)arg & 1) { // loop B1 dch_l2l1() 170 else { // B1 off dch_l2l1()`
H A D	hfc4s8s_l1.c	`1140 /* B1 RX Fifo has data to read / hfc4s8s_bh() 1145 / B1 TX Fifo has send completed */ hfc4s8s_bh()`
H A D	hisax_isac.c	`40 "2085 B1",`
H A D	icc.c	`29 {"2070 A1/A3", "2070 B1", "2070 B2/B3", "2070 V2.4"};`
H A D	isac.c	`28 {"2086/2186 V1.1", "2085 B1", "2085 B2",`
H A D	isdnl1.c	`824 debugl1(cs, "PH_TEST_LOOP B1"); dch_l2l1()`
H A D	elsa.c	`42 "B1", "A1"};`
/linux-4.1.27/arch/mips/sibyte/sb1250/
H A D	setup.c	`61 pass_str = "B1"; setup_bcm1250() 229 printk("@@@@ This is a BCM1250 B1/B2. board, and the " sb1250_setup() 236 printk("@@@@ This is a BCM1250 B1/B2, but the kernel is " sb1250_setup()`
/linux-4.1.27/arch/powerpc/include/asm/
H A D	reg_fsl_emb.h	`44 #define PMRN_PMLCB1 0x111 /* PM Local Control B1 / 77 #define PMRN_UPMLCB1 0x101 / User PM Local Control B1 */`
/linux-4.1.27/arch/blackfin/mach-bf518/include/mach/
H A D	defBF512.h	827 #define B1RDYEN 0x00010000 /* Bank 1 (B1) RDY Enable / 828 #define B1RDYPOL 0x00020000 / B1 RDY Active High / 829 #define B1TT_1 0x00040000 / B1 Transition Time (Read to Write) = 1 cycle / 830 #define B1TT_2 0x00080000 / B1 Transition Time (Read to Write) = 2 cycles / 831 #define B1TT_3 0x000C0000 / B1 Transition Time (Read to Write) = 3 cycles / 832 #define B1TT_4 0x00000000 / B1 Transition Time (Read to Write) = 4 cycles / 833 #define B1ST_1 0x00100000 / B1 Setup Time (AOE to Read/Write) = 1 cycle / 834 #define B1ST_2 0x00200000 / B1 Setup Time (AOE to Read/Write) = 2 cycles / 835 #define B1ST_3 0x00300000 / B1 Setup Time (AOE to Read/Write) = 3 cycles / 836 #define B1ST_4 0x00000000 / B1 Setup Time (AOE to Read/Write) = 4 cycles / 837 #define B1HT_1 0x00400000 / B1 Hold Time (~Read/Write to ~AOE) = 1 cycle / 838 #define B1HT_2 0x00800000 / B1 Hold Time (~Read/Write to ~AOE) = 2 cycles / 839 #define B1HT_3 0x00C00000 / B1 Hold Time (~Read/Write to ~AOE) = 3 cycles / 840 #define B1HT_0 0x00000000 / B1 Hold Time (~Read/Write to ~AOE) = 0 cycles / 841 #define B1RAT_1 0x01000000 / B1 Read Access Time = 1 cycle / 842 #define B1RAT_2 0x02000000 / B1 Read Access Time = 2 cycles / 843 #define B1RAT_3 0x03000000 / B1 Read Access Time = 3 cycles / 844 #define B1RAT_4 0x04000000 / B1 Read Access Time = 4 cycles / 845 #define B1RAT_5 0x05000000 / B1 Read Access Time = 5 cycles / 846 #define B1RAT_6 0x06000000 / B1 Read Access Time = 6 cycles / 847 #define B1RAT_7 0x07000000 / B1 Read Access Time = 7 cycles / 848 #define B1RAT_8 0x08000000 / B1 Read Access Time = 8 cycles / 849 #define B1RAT_9 0x09000000 / B1 Read Access Time = 9 cycles / 850 #define B1RAT_10 0x0A000000 / B1 Read Access Time = 10 cycles / 851 #define B1RAT_11 0x0B000000 / B1 Read Access Time = 11 cycles / 852 #define B1RAT_12 0x0C000000 / B1 Read Access Time = 12 cycles / 853 #define B1RAT_13 0x0D000000 / B1 Read Access Time = 13 cycles / 854 #define B1RAT_14 0x0E000000 / B1 Read Access Time = 14 cycles / 855 #define B1RAT_15 0x0F000000 / B1 Read Access Time = 15 cycles / 856 #define B1WAT_1 0x10000000 / B1 Write Access Time = 1 cycle / 857 #define B1WAT_2 0x20000000 / B1 Write Access Time = 2 cycles / 858 #define B1WAT_3 0x30000000 / B1 Write Access Time = 3 cycles / 859 #define B1WAT_4 0x40000000 / B1 Write Access Time = 4 cycles / 860 #define B1WAT_5 0x50000000 / B1 Write Access Time = 5 cycles / 861 #define B1WAT_6 0x60000000 / B1 Write Access Time = 6 cycles / 862 #define B1WAT_7 0x70000000 / B1 Write Access Time = 7 cycles / 863 #define B1WAT_8 0x80000000 / B1 Write Access Time = 8 cycles / 864 #define B1WAT_9 0x90000000 / B1 Write Access Time = 9 cycles / 865 #define B1WAT_10 0xA0000000 / B1 Write Access Time = 10 cycles / 866 #define B1WAT_11 0xB0000000 / B1 Write Access Time = 11 cycles / 867 #define B1WAT_12 0xC0000000 / B1 Write Access Time = 12 cycles / 868 #define B1WAT_13 0xD0000000 / B1 Write Access Time = 13 cycles / 869 #define B1WAT_14 0xE0000000 / B1 Write Access Time = 14 cycles / 870 #define B1WAT_15 0xF0000000 / B1 Write Access Time = 15 cycles */
/linux-4.1.27/arch/blackfin/mach-bf527/include/mach/
H A D	defBF522.h	828 #define B1RDYEN 0x00010000 /* Bank 1 (B1) RDY Enable / 829 #define B1RDYPOL 0x00020000 / B1 RDY Active High / 830 #define B1TT_1 0x00040000 / B1 Transition Time (Read to Write) = 1 cycle / 831 #define B1TT_2 0x00080000 / B1 Transition Time (Read to Write) = 2 cycles / 832 #define B1TT_3 0x000C0000 / B1 Transition Time (Read to Write) = 3 cycles / 833 #define B1TT_4 0x00000000 / B1 Transition Time (Read to Write) = 4 cycles / 834 #define B1ST_1 0x00100000 / B1 Setup Time (AOE to Read/Write) = 1 cycle / 835 #define B1ST_2 0x00200000 / B1 Setup Time (AOE to Read/Write) = 2 cycles / 836 #define B1ST_3 0x00300000 / B1 Setup Time (AOE to Read/Write) = 3 cycles / 837 #define B1ST_4 0x00000000 / B1 Setup Time (AOE to Read/Write) = 4 cycles / 838 #define B1HT_1 0x00400000 / B1 Hold Time (~Read/Write to ~AOE) = 1 cycle / 839 #define B1HT_2 0x00800000 / B1 Hold Time (~Read/Write to ~AOE) = 2 cycles / 840 #define B1HT_3 0x00C00000 / B1 Hold Time (~Read/Write to ~AOE) = 3 cycles / 841 #define B1HT_0 0x00000000 / B1 Hold Time (~Read/Write to ~AOE) = 0 cycles / 842 #define B1RAT_1 0x01000000 / B1 Read Access Time = 1 cycle / 843 #define B1RAT_2 0x02000000 / B1 Read Access Time = 2 cycles / 844 #define B1RAT_3 0x03000000 / B1 Read Access Time = 3 cycles / 845 #define B1RAT_4 0x04000000 / B1 Read Access Time = 4 cycles / 846 #define B1RAT_5 0x05000000 / B1 Read Access Time = 5 cycles / 847 #define B1RAT_6 0x06000000 / B1 Read Access Time = 6 cycles / 848 #define B1RAT_7 0x07000000 / B1 Read Access Time = 7 cycles / 849 #define B1RAT_8 0x08000000 / B1 Read Access Time = 8 cycles / 850 #define B1RAT_9 0x09000000 / B1 Read Access Time = 9 cycles / 851 #define B1RAT_10 0x0A000000 / B1 Read Access Time = 10 cycles / 852 #define B1RAT_11 0x0B000000 / B1 Read Access Time = 11 cycles / 853 #define B1RAT_12 0x0C000000 / B1 Read Access Time = 12 cycles / 854 #define B1RAT_13 0x0D000000 / B1 Read Access Time = 13 cycles / 855 #define B1RAT_14 0x0E000000 / B1 Read Access Time = 14 cycles / 856 #define B1RAT_15 0x0F000000 / B1 Read Access Time = 15 cycles / 857 #define B1WAT_1 0x10000000 / B1 Write Access Time = 1 cycle / 858 #define B1WAT_2 0x20000000 / B1 Write Access Time = 2 cycles / 859 #define B1WAT_3 0x30000000 / B1 Write Access Time = 3 cycles / 860 #define B1WAT_4 0x40000000 / B1 Write Access Time = 4 cycles / 861 #define B1WAT_5 0x50000000 / B1 Write Access Time = 5 cycles / 862 #define B1WAT_6 0x60000000 / B1 Write Access Time = 6 cycles / 863 #define B1WAT_7 0x70000000 / B1 Write Access Time = 7 cycles / 864 #define B1WAT_8 0x80000000 / B1 Write Access Time = 8 cycles / 865 #define B1WAT_9 0x90000000 / B1 Write Access Time = 9 cycles / 866 #define B1WAT_10 0xA0000000 / B1 Write Access Time = 10 cycles / 867 #define B1WAT_11 0xB0000000 / B1 Write Access Time = 11 cycles / 868 #define B1WAT_12 0xC0000000 / B1 Write Access Time = 12 cycles / 869 #define B1WAT_13 0xD0000000 / B1 Write Access Time = 13 cycles / 870 #define B1WAT_14 0xE0000000 / B1 Write Access Time = 14 cycles / 871 #define B1WAT_15 0xF0000000 / B1 Write Access Time = 15 cycles */
/linux-4.1.27/arch/blackfin/mach-bf537/include/mach/
H A D	defBF534.h	1150 #define B1RDYEN 0x00010000 /* Bank 1 (B1) RDY Enable / 1151 #define B1RDYPOL 0x00020000 / B1 RDY Active High / 1152 #define B1TT_1 0x00040000 / B1 Transition Time (Read to Write) = 1 cycle / 1153 #define B1TT_2 0x00080000 / B1 Transition Time (Read to Write) = 2 cycles / 1154 #define B1TT_3 0x000C0000 / B1 Transition Time (Read to Write) = 3 cycles / 1155 #define B1TT_4 0x00000000 / B1 Transition Time (Read to Write) = 4 cycles / 1156 #define B1ST_1 0x00100000 / B1 Setup Time (AOE to Read/Write) = 1 cycle / 1157 #define B1ST_2 0x00200000 / B1 Setup Time (AOE to Read/Write) = 2 cycles / 1158 #define B1ST_3 0x00300000 / B1 Setup Time (AOE to Read/Write) = 3 cycles / 1159 #define B1ST_4 0x00000000 / B1 Setup Time (AOE to Read/Write) = 4 cycles / 1160 #define B1HT_1 0x00400000 / B1 Hold Time (~Read/Write to ~AOE) = 1 cycle / 1161 #define B1HT_2 0x00800000 / B1 Hold Time (~Read/Write to ~AOE) = 2 cycles / 1162 #define B1HT_3 0x00C00000 / B1 Hold Time (~Read/Write to ~AOE) = 3 cycles / 1163 #define B1HT_0 0x00000000 / B1 Hold Time (~Read/Write to ~AOE) = 0 cycles / 1164 #define B1RAT_1 0x01000000 / B1 Read Access Time = 1 cycle / 1165 #define B1RAT_2 0x02000000 / B1 Read Access Time = 2 cycles / 1166 #define B1RAT_3 0x03000000 / B1 Read Access Time = 3 cycles / 1167 #define B1RAT_4 0x04000000 / B1 Read Access Time = 4 cycles / 1168 #define B1RAT_5 0x05000000 / B1 Read Access Time = 5 cycles / 1169 #define B1RAT_6 0x06000000 / B1 Read Access Time = 6 cycles / 1170 #define B1RAT_7 0x07000000 / B1 Read Access Time = 7 cycles / 1171 #define B1RAT_8 0x08000000 / B1 Read Access Time = 8 cycles / 1172 #define B1RAT_9 0x09000000 / B1 Read Access Time = 9 cycles / 1173 #define B1RAT_10 0x0A000000 / B1 Read Access Time = 10 cycles / 1174 #define B1RAT_11 0x0B000000 / B1 Read Access Time = 11 cycles / 1175 #define B1RAT_12 0x0C000000 / B1 Read Access Time = 12 cycles / 1176 #define B1RAT_13 0x0D000000 / B1 Read Access Time = 13 cycles / 1177 #define B1RAT_14 0x0E000000 / B1 Read Access Time = 14 cycles / 1178 #define B1RAT_15 0x0F000000 / B1 Read Access Time = 15 cycles / 1179 #define B1WAT_1 0x10000000 / B1 Write Access Time = 1 cycle / 1180 #define B1WAT_2 0x20000000 / B1 Write Access Time = 2 cycles / 1181 #define B1WAT_3 0x30000000 / B1 Write Access Time = 3 cycles / 1182 #define B1WAT_4 0x40000000 / B1 Write Access Time = 4 cycles / 1183 #define B1WAT_5 0x50000000 / B1 Write Access Time = 5 cycles / 1184 #define B1WAT_6 0x60000000 / B1 Write Access Time = 6 cycles / 1185 #define B1WAT_7 0x70000000 / B1 Write Access Time = 7 cycles / 1186 #define B1WAT_8 0x80000000 / B1 Write Access Time = 8 cycles / 1187 #define B1WAT_9 0x90000000 / B1 Write Access Time = 9 cycles / 1188 #define B1WAT_10 0xA0000000 / B1 Write Access Time = 10 cycles / 1189 #define B1WAT_11 0xB0000000 / B1 Write Access Time = 11 cycles / 1190 #define B1WAT_12 0xC0000000 / B1 Write Access Time = 12 cycles / 1191 #define B1WAT_13 0xD0000000 / B1 Write Access Time = 13 cycles / 1192 #define B1WAT_14 0xE0000000 / B1 Write Access Time = 14 cycles / 1193 #define B1WAT_15 0xF0000000 / B1 Write Access Time = 15 cycles */
/linux-4.1.27/include/uapi/linux/
H A D	b1lli.h	`3 * ISDN lowlevel-module for AVM B1-card.`
H A D	sonet.h	`10 __HANDLE_ITEM(section_bip); /* section parity errors (B1) */ \`
H A D	capi.h	`69 __u32 support1; /* B1 protocols support */`
H A D	ixjuser.h	`200 hz493 = 0x7685, /* .88 B1 */ 278 B1 = hz493, enumerator in enum:__anon13378`
/linux-4.1.27/arch/powerpc/platforms/powernv/
H A D	opal-lpc.c	`234 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that lpc_debug_read() 239 * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0 lpc_debug_read() 240 * 16-bit: B0 B1 0000B0B1 B1B00000 lpc_debug_read() 319 * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3 lpc_debug_write() 320 * 16-bit: B0 B1 0000B1B0 0000B0B1 lpc_debug_write()`
/linux-4.1.27/arch/m68k/fpsp040/
H A D	ssin.S	`42 \| 1 + rr(B1+s(B2+ ... + sB8)), s = rr. 288 \|--SGN + S'(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE 290 \|--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))]) 293 \|--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2 332 fadds COSB1,%fp1 \| ...B1+T(B3+T(B5+TB7)) 646 fadds COSB1,%fp0 \| ...B1+S(B2...) 647 fmulx SPRIME(%a6),%fp0 \| ...S'(B1+S(B2+...)) 713 fadds COSB1,%fp1 \| ...B1+S(B2...) 715 fmulx SPRIME(%a6),%fp1 \| ...S'(B1+S(B2+...))`
H A D	satan.S	`349 \|--ATAN(X) BY X + XY(B1+Y(B2+Y(B3+Y(B4+Y(B5+YB6))))) 350 \|--WHICH IS X + XY( [B1+Z(B3+ZB5)] + [Y(B2+Z(B4+ZB6)] ) 377 faddd ATANB1,%fp1 \| ...B1+Z(B3+ZB5) 382 faddx %fp2,%fp1 \| ...[B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))] 385 fmulx %fp1,%fp0 \| ...XY([B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))]) 443 fmulx %fp1,%fp0 \| ...X'Y([B1+Z(B3+ZB5)]`
H A D	slogn.S	`437 \|--U + UV(B1 + V(B2 + V(B3 + V(B4 + VB5)))) BY 438 \|--U + UV( [B1 + W(B3 + WB5)] + [V(B2 + WB4)] ) 458 faddd LOGB1,%fp1 \| ...B1+W(B3+WB5) 461 faddx %fp2,%fp1 \| ...B1+W(B3+WB5) + V(B2+WB4), FP2 RELEASED 464 fmulx %fp1,%fp0 \| ...UV( [B1+W(B3+WB5)] + [V(B2+WB4)] )`
H A D	setox.S	`302 \| p = X + XX(B1 + X(B2 + ... + XB12)) 304 \| made as "short" as possible: B1 (which is 1/2), B9 to B12 312 \| as X + ( SB1 + Q ) where S = XX and 838 fmuls #0x3F000000,%fp0 \| ...fp0 is SB1 844 faddx %fp1,%fp0 \| ...fp0 is SB1+Q`
/linux-4.1.27/sound/soc/codecs/
H A D	max98090.c	106 { 0x49, 0x00 }, /* 49 Equalizer Band 1 Coefficient B1 / 107 { 0x4A, 0x00 }, / 4A Equalizer Band 1 Coefficient B1 / 108 { 0x4B, 0x00 }, / 4B Equalizer Band 1 Coefficient B1 / 122 { 0x58, 0x00 }, / 58 Equalizer Band 2 Coefficient B1 / 123 { 0x59, 0x00 }, / 59 Equalizer Band 2 Coefficient B1 / 124 { 0x5A, 0x00 }, / 5A Equalizer Band 2 Coefficient B1 / 138 { 0x67, 0x00 }, / 67 Equalizer Band 3 Coefficient B1 / 139 { 0x68, 0x00 }, / 68 Equalizer Band 3 Coefficient B1 / 140 { 0x69, 0x00 }, / 69 Equalizer Band 3 Coefficient B1 / 154 { 0x76, 0x00 }, / 76 Equalizer Band 4 Coefficient B1 / 155 { 0x77, 0x00 }, / 77 Equalizer Band 4 Coefficient B1 / 156 { 0x78, 0x00 }, / 78 Equalizer Band 4 Coefficient B1 / 170 { 0x85, 0x00 }, / 85 Equalizer Band 5 Coefficient B1 / 171 { 0x86, 0x00 }, / 86 Equalizer Band 5 Coefficient B1 / 172 { 0x87, 0x00 }, / 87 Equalizer Band 5 Coefficient B1 / 186 { 0x94, 0x00 }, / 94 Equalizer Band 6 Coefficient B1 / 187 { 0x95, 0x00 }, / 95 Equalizer Band 6 Coefficient B1 / 188 { 0x96, 0x00 }, / 96 Equalizer Band 6 Coefficient B1 / 202 { 0xA3, 0x00 }, / A3 Equalizer Band 7 Coefficient B1 / 203 { 0xA4, 0x00 }, / A4 Equalizer Band 7 Coefficient B1 / 204 { 0xA5, 0x00 }, / A5 Equalizer Band 7 Coefficient B1 / 217 { 0xB1, 0x00 }, / B1 ADC Biquad Coefficient B0 / 218 { 0xB2, 0x00 }, / B2 ADC Biquad Coefficient B1 / 219 { 0xB3, 0x00 }, / B3 ADC Biquad Coefficient B1 / 220 { 0xB4, 0x00 }, / B4 ADC Biquad Coefficient B1 */
H A D	wm8997.c	`177 SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 190 SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 203 SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 216 SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT,`
H A D	wm5102.c	`749 SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 762 SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 775 SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 788 SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT,`
H A D	wm5110.c	`252 SOC_SINGLE_TLV("EQ1 B1 Volume", ARIZONA_EQ1_1, ARIZONA_EQ1_B1_GAIN_SHIFT, 265 SOC_SINGLE_TLV("EQ2 B1 Volume", ARIZONA_EQ2_1, ARIZONA_EQ2_B1_GAIN_SHIFT, 278 SOC_SINGLE_TLV("EQ3 B1 Volume", ARIZONA_EQ3_1, ARIZONA_EQ3_B1_GAIN_SHIFT, 291 SOC_SINGLE_TLV("EQ4 B1 Volume", ARIZONA_EQ4_1, ARIZONA_EQ4_B1_GAIN_SHIFT,`
H A D	max98088.c	`233 { 0xb1, 0x00 }, /* B1 DAI2 EQ5 / 454 { 0xFF, 0xFF, 0 }, / B1 DAI2 EQ5 */`
H A D	wm8996.c	`554 SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0, 565 SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0,`
H A D	max98095.c	`386 { 0x00, 0x00 }, /* B1 */`
/linux-4.1.27/drivers/atm/
H A D	uPD98402.h	`22 #define uPD98402_B1ECT 0x09 /* B1 Error Count Register / 87 #define uPD98402_PFM_B1E 0x10 / B1 error */`
H A D	suni.h	`134 BIP-8 error (B1) */`
/linux-4.1.27/include/uapi/mtd/
H A D	ubi-user.h	`361 * A and B one may create temporary volumes %A1 and %B1 with the new contents, 362 * then atomically re-name A1->A and B1->B, in which case old %A and %B will 366 * contain 4 entries: A1->A, A->A1, B1->B, B->B1, in which case old A1 and B1 367 * become A and B, and old A and B will become A1 and B1. 369 * It is also OK to request: A1->A, A1->X, B1->B, B->Y, in which case old A1 370 * and B1 become A and B, and old A and B become X and Y.`
/linux-4.1.27/drivers/usb/serial/
H A D	ftdi_sio.h	`253 * B1 RTS state 285 * B1 Output handshaking using DTR/DSR 515 * B1 Reserved - must be 0 527 * B1 Overrun Error (OE) 561 * B1 Reserved - must be 0`
H A D	kobil_sct.c	`22 * (Adapter K), B1 Professional and KAAN Professional (Adapter B) 131 dev_dbg(&serial->dev->dev, "KOBIL B1 PRO / KAAN PRO detected\n"); kobil_port_probe()`
H A D	ftdi_sio_ids.h	`799 #define KOBIL_CONV_B1_PID 0x2020 /* KOBIL Konverter for B1 */`
H A D	ftdi_sio.c	`1987 * B1 0`
H A D	option.c	`1974 { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e19, 0xff), /* D-Link DWM-221 B1 */`
/linux-4.1.27/arch/blackfin/include/asm/
H A D	dpmc.h	`372 B1 = I0; 379 B1.L = lo(EVT2); 384 FP = B1; 514 B1 = I0; 521 B1.L = lo(EVT15); 638 FP = B1;`
/linux-4.1.27/drivers/net/wireless/cw1200/
H A D	cw1200_spi.c	`52 LE: B0 B1 B2 B3 53 BE: B3 B2 B1 B0 57 B1 B0 B3 B2`
/linux-4.1.27/drivers/media/tuners/
H A D	mt2060_priv.h	`33 Reg.No \| B7 \| B6 \| B5 \| B4 \| B3 \| B2 \| B1 \| B0 \| ( defaults )`
H A D	tda9887.c	`345 tuner_info(" B1 auto mute fm : %s\n", dump_write_message()`
H A D	mt2063.c	`1834 step = "B1"; mt2063_init()`
/linux-4.1.27/arch/x86/include/asm/
H A D	olpc.h	`56 * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models`
/linux-4.1.27/include/memory/
H A D	jedec_ddr.h	`61 #define B1 0 macro`
/linux-4.1.27/arch/arm64/kvm/
H A D	handle_exit.c	`130 * See ARM ARM B1.14.1: "Hyp traps on instructions handle_exit()`
H A D	sys_regs.c	`76 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).`
/linux-4.1.27/arch/ia64/kernel/
H A D	entry.h	`56 .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \`
H A D	unwind_decoder.c	`372 UNW_DEC_COPY_STATE(B1, label, arg); unw_decode_b1() 374 UNW_DEC_LABEL_STATE(B1, label, arg); unw_decode_b1()`
H A D	paravirt_patch.c	`410 /* br.cond.sptk.many <target25> B1 */`
H A D	entry.S	`304 st8 [r14]=r21,SW(B1)-SW(B0) // save b0 309 st8 [r14]=r22,SW(B4)-SW(B1) // save b1 379 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat`
H A D	unwind.c	`2265 for (i = UNW_REG_B1, off = SW(B1); i <= UNW_REG_B5; ++i, off += 8) unw_init()`
/linux-4.1.27/drivers/net/wireless/b43/
H A D	phy_n.h	265 #define B43_NPHY_C2_RXIQ_COMPB1 B43_PHY_N(0x09D) /* Core 2 RX I/Q comp B1 / 343 #define B43_NPHY_TXF_20CO_B1S0 B43_PHY_N(0x0D0) / TX filter 20 coeff B1 stage 0 / 345 #define B43_NPHY_TXF_20CO_B1S1 B43_PHY_N(0x0D2) / TX filter 20 coeff B1 stage 1 / 347 #define B43_NPHY_TXF_20CO_B1S2 B43_PHY_N(0x0D4) / TX filter 20 coeff B1 stage 2 / 367 #define B43_NPHY_TXF_40CO_B1S0 B43_PHY_N(0x0E5) / TX filter 40 coeff B1 stage 0 / 369 #define B43_NPHY_TXF_40CO_B1S1 B43_PHY_N(0x0E7) / TX filter 40 coeff B1 stage 1 / 372 #define B43_NPHY_TXF_40CO_B1S2 B43_PHY_N(0x0E9) / TX filter 40 coeff B1 stage 2 / 507 #define B43_NPHY_C2_BPHY_RXIQCB1 B43_PHY_N(0x15E) / Core 2 B PHY RX I/Q comp B1 / 549 #define B43_NPHY_TXF_20CO_S0B1 B43_PHY_N(0x18C) / TX filter 20 coeff stage 0 B1 / 552 #define B43_NPHY_TXF_20CO_S1B1 B43_PHY_N(0x18F) / TX filter 20 coeff stage 1 B1 / 555 #define B43_NPHY_TXF_20CO_S2B1 B43_PHY_N(0x192) / TX filter 20 coeff stage 2 B1 / 564 #define B43_NPHY_TXF_40CO_S0B1 B43_PHY_N(0x19B) / TX filter 40 coeff stage 0 B1 / 567 #define B43_NPHY_TXF_40CO_S1B1 B43_PHY_N(0x19E) / TX filter 40 coeff stage 1 B1 / 570 #define B43_NPHY_TXF_40CO_S2B1 B43_PHY_N(0x1A1) / TX filter 40 coeff stage 2 B1 */
/linux-4.1.27/drivers/usb/wusbcore/
H A D	crypto.c	`82 * the MIC, the message is broken in N counter-mode blocks, B0, B1, 87 * B1 contains l(a), the MAC header, the encryption offset and padding. 166 * @key. We bytewise xor B0 with B1 (1) and AES-crypt that. Then we 244 /* Setup B1 wusb_ccm_mac() 247 * says that to initialize B1 from A with 'l(a) = blen + wusb_ccm_mac()`
/linux-4.1.27/drivers/misc/
H A D	bmp085.c	`72 s16 B1, B2; member in struct:bmp085_calibration_data 117 cali->B1 = be16_to_cpu(tmp[6]); bmp085_read_calibration_data() 264 x2 = (cali->B1 * ((data->b6 * data->b6) >> 12)) >> 16; bmp085_get_pressure()`
/linux-4.1.27/drivers/crypto/nx/
H A D	nx-aes-ccm.c	`207 * operation on 2 AES blocks, B0 (stored in the csbcpb) and B1, generate_pat() 214 * B1 differently and feed in the associated data to a CCA generate_pat() 230 /* generate B1: generate_pat()`
/linux-4.1.27/net/sched/
H A D	ematch.c	`28 * A AND (B1 OR B2) AND C AND D 34 * \| A AND \| B AND \| C AND \| D END \| B1 OR \| B2 END \| 39 * where B is a virtual ematch referencing to sequence starting with B1.`
/linux-4.1.27/include/media/
H A D	adv7842.h	`125 uint16_t B1; member in struct:adv7842_sdp_csc_coeff`
/linux-4.1.27/arch/blackfin/kernel/
H A D	pseudodbg.c	`16 "B0", "B1", "B2", "B3", "L0", "L1", "L2", "L3",`
H A D	trace.c	`973 pr_notice(" B1 : %08lx L1 : %08lx M1 : %08lx I1 : %08lx\n", show_regs()`
/linux-4.1.27/arch/arm/kvm/
H A D	handle_exit.c	`156 * See ARM ARM B1.14.1: "Hyp traps on instructions handle_exit()`
H A D	coproc.c	`193 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).`
H A D	mmu.c	`1867 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).`
/linux-4.1.27/scripts/
H A D	check_extable.sh	`54 eval $(objdump -rj .altinstructions ${obj} \| grep -B1 "${section}+${section_offset}" \| head -n1 \| awk '{print $3}' \|`
/linux-4.1.27/arch/powerpc/perf/
H A D	ppc970-pmu.c	`91 * SPT0T1 UC PS1 PS2 B0 B1 B2 B3 P1P2P3P4P5P6P7P8 120 * B1, B2, B3`
H A D	power5+-pmu.c	`80 * NC G0G1G2 G3 T0T1 UC B0 B1 B2 B3 P6P5P4P3P2P1 109 * B1, B2, B3`
H A D	power5-pmu.c	`80 * T0T1 NC G0G1G2 G3 UC PS1PS2 B0 B1 B2 B3 P6P5P4P3P2P1 117 * B1, B2, B3`
H A D	power4-pmu.c	`108 * \| UC1 UC2 UC3 \|\|\| PS1 PS2 B0 B1 B2 B3 P1P2P3P4P5P6P7P8 166 * B1, B2, B3`
/linux-4.1.27/drivers/isdn/hardware/mISDN/
H A D	hfcpci.c	274 * STIO1 is used as output for data, B1+B2 from ST->IOM+HFC reset_hfcpci() 275 * STIO2 is used as data input, B1+B2 from IOM->ST reset_hfcpci() 280 /* set data flow directions: connect B1,B2: HFC to/from PCM / reset_hfcpci() 1201 if (val & 0x08) { / B1 rx / hfcpci_int() 1215 if (val & 0x01) { / B1 tx / hfcpci_int() 1277 hc->hw.bswapped = 0; / B1 and B2 normal mode / mode_hfcpci() 1282 hc->hw.bswapped = 1; / B1 and B2 exchanged / mode_hfcpci() 1285 hc->hw.bswapped = 0; / B1 and B2 normal mode / mode_hfcpci() 1290 hc->hw.bswapped = 0; / B1 and B2 normal mode / mode_hfcpci() 2281 if (bch && bch->state == ISDN_P_B_RAW) { / B1 rx&tx */ _hfcpci_softirq()
H A D	hfcsusb.h	`73 #define HFCUSB_B1_TX 0 /* index for B1 transmit bulk/int / 74 #define HFCUSB_B1_RX 1 / index for B1 receive bulk/int */`
H A D	mISDNipac.c	`617 if (para & 1) /* B1 / isac_ctrl() 781 {"2086/2186 V1.1", "2085 B1", "2085 B2", 1235 if (hscx->bch.nr & 1) { / B1 and ICA / hscx_mode() 1524 / cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */ channel_ctrl()`
H A D	speedfax.c	`230 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */ channel_ctrl()`
H A D	avmfritz.c	`889 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */ channel_ctrl()`
H A D	netjet.c	`844 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */ channel_ctrl()`
/linux-4.1.27/drivers/video/fbdev/
H A D	ssd1307fb.c	`149 * B0 B1 B2 B3 B4 ssd1307fb_update_display() 159 * (2) A1 B1 C1 D1 E1 F1 G1 H1 ssd1307fb_update_display()`
/linux-4.1.27/mm/
H A D	internal.h	`138 * 1) Any buddy B1 will have an order O twin B2 which satisfies 140 * B2 = B1 ^ (1 << O)`
/linux-4.1.27/drivers/media/usb/pvrusb2/
H A D	pvrusb2-std.c	`94 {"B1",TSTD_B1},`
/linux-4.1.27/drivers/cpufreq/
H A D	sa1110-cpufreq.c	`13 * SDRAM reads (rev A0, B0, B1)`
/linux-4.1.27/drivers/tty/
H A D	moxa.h	`167 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */`
/linux-4.1.27/drivers/watchdog/
H A D	advantechwdt.c	`60 * Both are 0x443 for most boards (tested on a PCA-6276VE-00B1), but`
/linux-4.1.27/drivers/isdn/gigaset/
H A D	capi.c	`130 [21] = { "8890", "91B1" }, /* Teletex service basic mode / 964 / B1 protocols: 64 kbit/s HDLC or transparent */ gigaset_isdn_start() 1547 "B1 Protocol %u unsupported, using Transparent\n", do_connect_req() 1560 "CONNECT_REQ", "B1 Configuration"); do_connect_req() 1689 "B1 Protocol %u unsupported, using Transparent\n", do_connect_resp() 1702 "CONNECT_RESP", "B1 Configuration"); do_connect_resp()`
H A D	bas-gigaset.c	`2638 gig_dbg(DEBUG_INIT, "closing B1 channel"); bas_gigaset_exit()`
/linux-4.1.27/drivers/isdn/hardware/eicon/
H A D	mdm_msg.h	`336 CAPI B1 Config Constants`
H A D	divacapi.h	`1286 /* B1 resource switching */`
H A D	message.c	`7616 { /* B1 - modem / add_b1() 13352 / B1 resource switching */ 13949 dbug(1, dprintf("[%06lx] %s,%d: Adjust B1 resource %d %04x...", adjust_b1_resource()`
/linux-4.1.27/drivers/misc/mic/host/
H A D	mic_sysfs.c	`109 string = "B1"; stepping_show()`
/linux-4.1.27/arch/x86/platform/olpc/
H A D	olpc.c	`389 /* assume B1 and above models always have a DCON */ olpc_init()`
/linux-4.1.27/arch/sh/boards/
H A D	board-magicpanelr2.c	`106 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); setup_port_multiplexing()`
/linux-4.1.27/fs/ufs/
H A D	ufs_fs.h	`103 #define UFS_MAGIC_SEC 0x00612195 /* B1 security fs / 112 / Seems somebody at HP goofed here. B1 and lfs are both 0x2 !?! / 114 #define UFS_FSF_B1 0x00000002 / B1 security */`
/linux-4.1.27/drivers/media/i2c/
H A D	ad9389b.c	`182 u16 B1, u16 B2, u16 B3, u16 B4, ad9389b_csc_coeff() 196 ad9389b_wr_and_or(sd, 0x20, 0xe0, B1>>8); ad9389b_csc_coeff() 197 ad9389b_wr(sd, 0x21, B1); ad9389b_csc_coeff() 180 ad9389b_csc_coeff(struct v4l2_subdev *sd, u16 A1, u16 A2, u16 A3, u16 A4, u16 B1, u16 B2, u16 B3, u16 B4, u16 C1, u16 C2, u16 C3, u16 C4) ad9389b_csc_coeff() argument`
H A D	adv7511.c	`257 u16 B1, u16 B2, u16 B3, u16 B4, adv7511_csc_coeff() 271 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8); adv7511_csc_coeff() 272 adv7511_wr(sd, 0x21, B1); adv7511_csc_coeff() 255 adv7511_csc_coeff(struct v4l2_subdev *sd, u16 A1, u16 A2, u16 A3, u16 A4, u16 B1, u16 B2, u16 B3, u16 B4, u16 C1, u16 C2, u16 C3, u16 C4) adv7511_csc_coeff() argument`
H A D	tvaudio.c	`614 * B1, B0: Input source selection 1373 * B1 B0`
H A D	adv7842.c	`1644 sdp_io_write_and_or(sd, 0xe8, 0xe0, c->B1 >> 8); sdp_csc_coeff() 1645 sdp_io_write(sd, 0xe9, c->B1); sdp_csc_coeff()`
/linux-4.1.27/arch/m68k/ifpsp060/src/
H A D	fplsp.S	4933 # even polynomial in r, 1 + rr(B1+s(B2+ ... + sB8)), # 5129 #--SGN + S'(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE 5131 #--SGN + S'([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))]) 5134 #--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2 5175 fadd.s COSB1(%pc),%fp1 # B1+T(B3+T(B5+TB7)) 5345 fadd.s COSB1(%pc),%fp0 # B1+S(B2...) 5346 fmul.x SPRIME(%a6),%fp0 # S'(B1+S(B2+...)) 5417 fadd.s COSB1(%pc),%fp1 # B1+S(B2...) 5419 fmul.x SPRIME(%a6),%fp1 # S'(B1+S(B2+...)) 6352 #--ATAN(X) BY X + XY(B1+Y(B2+Y(B3+Y(B4+Y(B5+YB6))))) 6353 #--WHICH IS X + XY( [B1+Z(B3+ZB5)] + [Y(B2+Z(B4+ZB6)] ) 6380 fadd.d ATANB1(%pc),%fp1 # B1+Z(B3+ZB5) 6385 fadd.x %fp2,%fp1 # [B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))] 6387 fmul.x %fp1,%fp0 # XY([B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))]) 6446 fmul.x %fp1,%fp0 # X'Y([B1+Z(B3+ZB5)] 6971 # p = X + XX(B1 + X(B2 + ... + XB12)) # 6973 # are made as "short" as possible: B1 (which is 1/2), B9 # 6982 # X + ( SB1 + Q ) where S = XX and # 7467 fmul.s &0x3F000000,%fp0 # fp0 is SB1 7472 fadd.x %fp1,%fp0 # fp0 is SB1+Q 8341 #--U + UV(B1 + V(B2 + V(B3 + V(B4 + VB5)))) BY 8342 #--U + UV( [B1 + W(B3 + WB5)] + [V(B2 + WB4)] ) 8362 fadd.d LOGB1(%pc),%fp1 # B1+W(B3+WB5) 8365 fadd.x %fp2,%fp1 # B1+W(B3+WB5) + V(B2+WB4), FP2 RELEASED 8368 fmul.x %fp1,%fp0 # UV( [B1+W(B3+WB5)] + [V(B2+WB4)] )
H A D	fpsp.S	5039 # even polynomial in r, 1 + rr(B1+s(B2+ ... + sB8)), # 5235 #--SGN + S'(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE 5237 #--SGN + S'([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))]) 5240 #--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2 5281 fadd.s COSB1(%pc),%fp1 # B1+T(B3+T(B5+TB7)) 5451 fadd.s COSB1(%pc),%fp0 # B1+S(B2...) 5452 fmul.x SPRIME(%a6),%fp0 # S'(B1+S(B2+...)) 5523 fadd.s COSB1(%pc),%fp1 # B1+S(B2...) 5525 fmul.x SPRIME(%a6),%fp1 # S'(B1+S(B2+...)) 6458 #--ATAN(X) BY X + XY(B1+Y(B2+Y(B3+Y(B4+Y(B5+YB6))))) 6459 #--WHICH IS X + XY( [B1+Z(B3+ZB5)] + [Y(B2+Z(B4+ZB6)] ) 6486 fadd.d ATANB1(%pc),%fp1 # B1+Z(B3+ZB5) 6491 fadd.x %fp2,%fp1 # [B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))] 6493 fmul.x %fp1,%fp0 # XY([B1+Z(B3+ZB5)]+[Y(B2+Z(B4+ZB6))]) 6552 fmul.x %fp1,%fp0 # X'Y([B1+Z(B3+ZB5)] 7077 # p = X + XX(B1 + X(B2 + ... + XB12)) # 7079 # are made as "short" as possible: B1 (which is 1/2), B9 # 7088 # X + ( SB1 + Q ) where S = XX and # 7573 fmul.s &0x3F000000,%fp0 # fp0 is SB1 7578 fadd.x %fp1,%fp0 # fp0 is SB1+Q 8447 #--U + UV(B1 + V(B2 + V(B3 + V(B4 + VB5)))) BY 8448 #--U + UV( [B1 + W(B3 + WB5)] + [V(B2 + WB4)] ) 8468 fadd.d LOGB1(%pc),%fp1 # B1+W(B3+WB5) 8471 fadd.x %fp2,%fp1 # B1+W(B3+WB5) + V(B2+WB4), FP2 RELEASED 8474 fmul.x %fp1,%fp0 # UV( [B1+W(B3+WB5)] + [V(B2+WB4)] )
/linux-4.1.27/drivers/staging/rtl8188eu/os_dep/
H A D	usb_intf.c	`50 {USB_DEVICE(0x2001, 0x3311)}, /* DLink GO-USB-N150 REV B1 */`
/linux-4.1.27/drivers/input/mouse/
H A D	vsxxxaa.c	`274 * [0]: 1 1 0 B4 B3 B2 B1 Pr vsxxxaa_handle_ABS_packet()`
H A D	hgpk.c	`762 * earlier prototypes (B1) had some brokenness that required a reset. hgpk_reconnect()`
/linux-4.1.27/drivers/input/tablet/
H A D	wacom_serial4.c	`59 * bit 4 B1`
/linux-4.1.27/drivers/char/agp/
H A D	amd-k7-agp.c	`458 * Revisions B0/B1 were a disaster. agp_amdk7_probe()`
H A D	amd64-agp.c	`359 case 0x12: revstring="B1"; break; amd8151_init()`
/linux-4.1.27/drivers/net/usb/
H A D	asix_devices.c	`1030 // DLink DUB-E100 H/W Ver B1 1034 // DLink DUB-E100 H/W Ver B1 Alternate`
/linux-4.1.27/drivers/net/wireless/ath/carl9170/
H A D	rx.c	`225 * bytes: 04 c2 XX YY B4 B3 B2 B1 carl9170_handle_command_response() 229 * B1-B4 "should" be the number of send out beacons. carl9170_handle_command_response()`
/linux-4.1.27/drivers/isdn/capi/
H A D	capidrv.c	`213 /* CAPI-Spec "B1 Configuration" */ b1config_async_v110() 850 return "B1 protocol not supported"; capi_info2str() 856 return "B1 protocol parameter not supported"; capi_info2str()`
/linux-4.1.27/drivers/media/dvb-frontends/
H A D	drxd_hard.c	`2 * drxd_hard.c: DVB-T Demodulator Micronas DRX3975D-A2,DRX397xD-B1 1520 printk(KERN_INFO "DRX397%dD-B1\n", deviceId); SetDeviceTypeId() 2630 /* Apply I2c address patch to B1 */ DRXD_init()`
H A D	drxd_firm.c	`27 * Contains B1 firmware version: 3.3.33`
H A D	tda18271c2dd.c	`595 printk(KERN_ERR "tda18271c2dd: %s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__, RFTrackingFiltersInit()`
/linux-4.1.27/drivers/media/common/
H A D	tveeprom.c	`271 { TUNER_ABSENT, "Siano SMS1150 B1"},`
/linux-4.1.27/lib/fonts/
H A D	font_acorn_8x8.c	`183 /* B1 */ 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa,`
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
H A D	rfbuffer.h	`42 * Also check out reg.h and U.S. Patent 6677779 B1 (about buffer`
/linux-4.1.27/drivers/scsi/pm8001/
H A D	pm8001_hwi.h	`562 /* B1-0 : reserved */`
H A D	pm80xx_hwi.h	`685 /* B1-0 : reserved */`
/linux-4.1.27/drivers/edac/
H A D	i7300_edac.c	`832 (mir[mir_no] & 2) ? "B1" : ""); decode_mir()`
H A D	e752x_edac.c	`502 "PCI Express B1",`
H A D	i5000_edac.c	`1198 edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n", i5000_get_mc_regs()`
H A D	i5400_edac.c	`1118 edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n", i5400_get_mc_regs()`
/linux-4.1.27/sound/pci/hda/
H A D	patch_cirrus.c	`994 coef \|= 0x0008; /* B1,B2 are GPIOs */ cs4210_pinmux_init()`
/linux-4.1.27/drivers/usb/gadget/udc/
H A D	amd5536udc.c	`3281 (dev->chiprev == UDC_HSA0_REV) ? "A0" : "B1"); udc_probe() 3289 "driver version: %s(for Geode5536 B1)\n", tmp); udc_probe()`
H A D	pxa25x_udc.c	`1573 /* pxa210/250 erratum 131 for B0/B1 says RNE lies. handle_ep0()`
/linux-4.1.27/drivers/isdn/mISDN/
H A D	l1oip_core.c	`1030 ch = rq->adr.channel; /* BRI: 1=B1 2=B2 PRI: 1..15,17.. */ open_bchannel()`
/linux-4.1.27/drivers/message/fusion/
H A D	mptbase.c	`1437 product_str = "LSIFC909 B1"; mpt_get_product_name() 1487 product_str = "LSI53C1030 B1"; mpt_get_product_name() 1556 product_str = "LSISAS1064E B1"; mpt_get_product_name() 1579 product_str = "LSISAS1068 B1"; mpt_get_product_name() 1596 product_str = "LSISAS1068E B1"; mpt_get_product_name()`
/linux-4.1.27/drivers/dma/
H A D	coh901318.c	`213 * Syntax is [A1, B1, A2, B2, .... ,-1,-1]`
/linux-4.1.27/sound/pci/ctxfi/
H A D	cthw20k2.c	`1625 0x00000000, /* Vol Control B1 */ hw_dac_init()`
/linux-4.1.27/drivers/media/v4l2-core/
H A D	v4l2-ioctl.c	`56 { V4L2_STD_PAL_B1, "PAL-B1" },`
/linux-4.1.27/drivers/net/ethernet/sis/
H A D	sis900.c	`1271 /* 630B0&B1 rule to determine the equalizer value */ sis630_set_eq()`
/linux-4.1.27/net/sctp/
H A D	sm_statefuns.c	`5705 * If the T4 RTO timer expires the endpoint should do B1 to B5 5720 /* ADDIP 4.1 B1) Increment the error counters and perform path failure sctp_sf_t4_timer_expire()`
/linux-4.1.27/drivers/media/pci/saa7134/
H A D	saa7134-cards.c	`3045 .name = "AVerMedia A169 B1",`
/linux-4.1.27/drivers/video/fbdev/aty/
H A D	atyfb_base.c	`491 name = "ATI264VT3 (B1) (Mach64 VT)"; correct_chipset()`

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