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Searched refs:ASID (Results 1 – 11 of 11) sorted by relevance

/linux-4.1.27/arch/m32r/mm/
Dmmu.S37 ld r0, @(MDEVP_offset, r3) ; r0: PFN + ASID (MDEVP reg.)
44 ;; r0: PFN + ASID (MDEVP reg.)
47 ;; r0: PFN + ASID
73 ;; r0: MDEVP reg. (included ASID)
76 ;; r0: PFN + ASID
84 or r0, r1 ; r0: PFN + ASID
104 ;; r0: PFN + ASID
109 ;; r0: PFN + ASID
131 ;; r0: PFN + ASID
135 ;; r0: PFN + ASID
[all …]
/linux-4.1.27/arch/arm64/include/asm/
Dtlbflush.h78 unsigned long asid = (unsigned long)ASID(mm) << 48; in flush_tlb_mm()
89 ((unsigned long)ASID(vma->vm_mm) << 48); in flush_tlb_page()
99 unsigned long asid = (unsigned long)ASID(vma->vm_mm) << 48; in __flush_tlb_range()
153 unsigned long addr = uaddr >> 12 | ((unsigned long)ASID(mm) << 48); in __flush_tlb_pgtable()
Dmmu.h28 #define ASID(mm) ((mm)->context.id & 0xffff) macro
/linux-4.1.27/arch/avr32/mach-at32ap/
Dpm.c58 tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); in avr32_pm_map_sram()
85 tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); in avr32_pm_unmap_sram()
/linux-4.1.27/arch/arm/include/asm/
Dmmu.h22 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro
24 #define ASID(mm) (0) macro
Dtlbflush.h369 const int asid = ASID(mm); in __local_flush_tlb_mm()
387 const int asid = ASID(mm); in local_flush_tlb_mm()
411 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm()
424 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page()
445 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page()
462 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
/linux-4.1.27/arch/arm/mm/
Dtlb-v7.S41 asid r3, r3 @ mask ASID
50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
Dtlb-v6.S43 asid r3, r3 @ mask ASID
DKconfig581 This indicates whether the CPU has the ASID register; used to
/linux-4.1.27/arch/avr32/mm/
Dtlb.c38 SYSREG_BFEXT(ASID, tlbehi), in show_dtlb_entry()
73 tlbehi = SYSREG_BF(ASID, SYSREG_BFEXT(ASID, tlbehi)); in update_dtlb()
337 SYSREG_BFEXT(ASID, tlbehi), in tlb_show()
/linux-4.1.27/arch/arm/
DKconfig1120 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1124 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1129 entries regardless of the ASID.
1157 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1162 which starts prior to an ASID switch but completes afterwards. This
1164 the new ASID. This workaround places two dsb instructions in the mm
1165 switching code so that no page table walks can cross the ASID switch.
1221 which sends an IPI to the CPUs that are running the same ASID