Searched refs:ARCH_DMA_MINALIGN (Results 1 - 25 of 25) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-tx49xx/
H A Dkmalloc.h4 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/mips/include/asm/mach-ip32/
H A Dkmalloc.h6 #define ARCH_DMA_MINALIGN 32 macro
8 #define ARCH_DMA_MINALIGN 128 macro
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
H A Dkmalloc.h5 * All happy, no need to define ARCH_DMA_MINALIGN
/linux-4.1.27/arch/m68k/include/asm/
H A Dcache.h11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/metag/include/asm/
H A Dcache.h16 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
18 #define ARCH_DMA_MINALIGN 8 macro
/linux-4.1.27/arch/mips/include/asm/mach-generic/
H A Dkmalloc.h10 #define ARCH_DMA_MINALIGN 128 macro
/linux-4.1.27/arch/xtensa/include/asm/
H A Dcache.h32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/unicore32/include/asm/
H A Dcache.h25 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/arm/include/asm/
H A Dcache.h17 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/nios2/include/asm/
H A Dcache.h31 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/powerpc/include/asm/
H A Dpage_32.h13 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/avr32/include/asm/
H A Dcache.h14 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/blackfin/include/asm/
H A Dcache.h20 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/hexagon/include/asm/
H A Dcache.h28 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/tile/include/asm/
H A Dcache.h31 * I/O, but PCI traffic does not) and setting ARCH_DMA_MINALIGN to the
40 #define ARCH_DMA_MINALIGN L2_CACHE_BYTES macro
/linux-4.1.27/arch/mn10300/include/asm/
H A Dcache.h24 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/parisc/include/asm/
H A Dcache.h29 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/arm64/include/asm/
H A Dcache.h31 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/frv/include/asm/
H A Dmem-layout.h38 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/arc/include/asm/
H A Dcache.h50 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/c6x/include/asm/
H A Dcache.h48 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/include/linux/
H A Ddma-mapping.h194 #ifdef ARCH_DMA_MINALIGN dma_get_cache_alignment()
195 return ARCH_DMA_MINALIGN; dma_get_cache_alignment()
H A Dslab.h152 #if defined(ARCH_DMA_MINALIGN) && ARCH_DMA_MINALIGN > 8
153 #define ARCH_KMALLOC_MINALIGN ARCH_DMA_MINALIGN
154 #define KMALLOC_MIN_SIZE ARCH_DMA_MINALIGN
155 #define KMALLOC_SHIFT_LOW ilog2(ARCH_DMA_MINALIGN)
/linux-4.1.27/arch/microblaze/include/asm/
H A Dpage.h43 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/linux-4.1.27/arch/sh/include/asm/
H A Dpage.h193 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro

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