Searched refs:AR934X_SRIF_DDR_DPLL2_REG (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/ath79/
H A Dclock.c283 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG); ar934x_clocks_init()
/linux-4.1.27/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h542 #define AR934X_SRIF_DDR_DPLL2_REG 0x244 macro

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