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Searched refs:AR71XX_RESET_REG_MISC_INT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/ath79/
Dirq.c36 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ath79_misc_irq_handler()
57 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_unmask()
58 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_unmask()
61 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_unmask()
70 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_mask()
71 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_mask()
74 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ar71xx_misc_irq_mask()
101 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); in ath79_misc_irq_init()
/linux-4.1.27/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h295 #define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14 macro