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Searched refs:APMU_DISP0 (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/drivers/clk/mmp/
Dclk-of-mmp2.c51 #define APMU_DISP0 0x4c macro
209 …disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 2, 0, &disp0…
214 {0, "disp0_div", "disp0_mux", CLK_SET_RATE_PARENT, APMU_DISP0, 8, 4, 0, &disp0_lock},
215 {0, "disp0_sphy_div", "disp0_mux", CLK_SET_RATE_PARENT, APMU_DISP0, 15, 5, 0, &disp0_lock},
228 …{MMP2_CLK_DISP0, "disp0_clk", "disp0_div", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1b, 0x1b, 0x0, 0, &d…
229 …{MMP2_CLK_DISP0_SPHY, "disp0_sphy_clk", "disp0_sphy_div", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1024,…
Dclk-mmp2.c49 #define APMU_DISP0 0x4c macro
368 apmu_base + APMU_DISP0, 6, 2, 0, &clk_lock); in mmp2_clk_init()
372 CLK_SET_RATE_PARENT, apmu_base + APMU_DISP0, in mmp2_clk_init()
377 apmu_base + APMU_DISP0, 0x1b, &clk_lock); in mmp2_clk_init()
381 apmu_base + APMU_DISP0, 15, 5, 0, &clk_lock); in mmp2_clk_init()
385 apmu_base + APMU_DISP0, 0x1024, &clk_lock); in mmp2_clk_init()
Dclk-pxa168.c43 #define APMU_DISP0 0x4c macro
319 apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock); in pxa168_clk_init()
323 apmu_base + APMU_DISP0, 0x1b, &clk_lock); in pxa168_clk_init()
327 apmu_base + APMU_DISP0, 0x24, &clk_lock); in pxa168_clk_init()
Dclk-of-pxa168.c45 #define APMU_DISP0 0x4c macro
184 …{0, "disp0_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0
200 …{PXA168_CLK_DISP0, "disp0_clk", "disp0_mux", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1b, 0x1b, 0x0, 0, …
Dclk-of-pxa910.c43 #define APMU_DISP0 0x4c macro
186 …{0, "disp0_mux", disp_parent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0
202 …{PXA910_CLK_DISP0, "disp0_clk", "disp0_mux", CLK_SET_RATE_PARENT, APMU_DISP0, 0x1b, 0x1b, 0x0, 0, …
Dclk-pxa910.c41 #define APMU_DISP0 0x4c macro
294 apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock); in pxa910_clk_init()
298 apmu_base + APMU_DISP0, 0x1b, &clk_lock); in pxa910_clk_init()