Searched refs:APBC_SSP2 (Results 1 - 9 of 9) sorted by relevance
| /linux-4.1.27/arch/arm/mach-mmp/ |
| H A D | clock-pxa910.c | 24 #define APBC_SSP2 APBC_REG(0x020) macro
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| H A D | clock-pxa168.c | 29 #define APBC_SSP2 APBC_REG(0x820) macro
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| H A D | clock-mmp2.c | 32 #define APBC_SSP2 APBC_REG(0x054) macro
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| /linux-4.1.27/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 37 #define APBC_SSP2 0x84c macro
130 {0, "ssp2_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP2, 4, 3, 0, &ssp2_lock},
151 {PXA168_CLK_SSP2, "ssp2_clk", "ssp2_mux", CLK_SET_RATE_PARENT, APBC_SSP2, 0x3, 0x3, 0x0, 0, &ssp2_lock},
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| H A D | clk-pxa168.c | 35 #define APBC_SSP2 0x84c macro
257 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); pxa168_clk_init()
260 clk = mmp_clk_register_apbc("ssp2", "ssp1_mux", apbc_base + APBC_SSP2, pxa168_clk_init()
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| H A D | clk-mmp2.c | 42 #define APBC_SSP2 0x58 macro
317 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); mmp2_clk_init()
321 apbc_base + APBC_SSP2, 10, 0, &clk_lock); mmp2_clk_init()
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| H A D | clk-of-mmp2.c | 44 #define APBC_SSP2 0x58 macro
146 {0, "ssp2_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP2, 4, 3, 0, &ssp2_lock},
171 {MMP2_CLK_SSP2, "ssp2_clk", "ssp2_mux", CLK_SET_RATE_PARENT, APBC_SSP2, 0x7, 0x3, 0x0, 0, &ssp2_lock},
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| H A D | clk-of-pxa910.c | 37 #define APBC_SSP2 0x4c macro
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| H A D | clk-pxa910.c | 35 #define APBC_SSP2 0x4c macro
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