Searched refs:APBC_SSP1 (Results 1 – 9 of 9) sorted by relevance
| /linux-4.1.27/drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 36 #define APBC_SSP1 0x820 macro
129 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
150 …{PXA168_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_…
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| D | clk-of-pxa910.c | 36 #define APBC_SSP1 0x20 macro
124 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
144 …{PXA910_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_…
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| D | clk-pxa910.c | 34 #define APBC_SSP1 0x20 macro
252 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in pxa910_clk_init()
256 apbc_base + APBC_SSP1, 10, 0, &clk_lock); in pxa910_clk_init()
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| D | clk-of-mmp2.c | 43 #define APBC_SSP1 0x54 macro
145 …{0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4,…
170 …{MMP2_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x7, 0x3, 0x0, 0, &ssp1_lo…
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| D | clk-pxa168.c | 34 #define APBC_SSP1 0x820 macro
247 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in pxa168_clk_init()
250 clk = mmp_clk_register_apbc("ssp1", "ssp1_mux", apbc_base + APBC_SSP1, in pxa168_clk_init()
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| D | clk-mmp2.c | 41 #define APBC_SSP1 0x54 macro
307 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in mmp2_clk_init()
311 apbc_base + APBC_SSP1, 10, 0, &clk_lock); in mmp2_clk_init()
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| /linux-4.1.27/arch/arm/mach-mmp/ |
| D | clock-pxa910.c | 23 #define APBC_SSP1 APBC_REG(0x01c) macro
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| D | clock-pxa168.c | 28 #define APBC_SSP1 APBC_REG(0x81c) macro
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| D | clock-mmp2.c | 31 #define APBC_SSP1 APBC_REG(0x050) macro
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