Searched refs:AMCC_OP_REG_MCSR_NVCMD (Results 1 – 3 of 3) sorted by relevance
179 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait()195 outb(NVCMD_LOAD_LOW, iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_readw()201 outb(NVCMD_LOAD_HIGH, iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_readw()208 outb(NVCMD_BEGIN_READ, iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_readw()
41 #define AMCC_OP_REG_MCSR_NVCMD (AMCC_OP_REG_MCSR + 3) /* Command in byte 3 */ macro
517 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY) in wait_for_nvram_ready()535 iobase + AMCC_OP_REG_MCSR_NVCMD); in nvram_read()538 iobase + AMCC_OP_REG_MCSR_NVCMD); in nvram_read()540 outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD); in nvram_read()