Searched refs:AFAB_SMPSS_M0_RESET (Results 1 - 21 of 21) sorted by relevance
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/include/dt-bindings/reset/ |
H A D | qcom,gcc-ipq806x.h | 20 #define AFAB_SMPSS_M0_RESET 3 macro
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H A D | qcom,gcc-msm8660.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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H A D | qcom,gcc-msm8960.h | 22 #define AFAB_SMPSS_M0_RESET 5 macro
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/linux-4.1.27/drivers/clk/qcom/ |
H A D | gcc-msm8960.c | 3165 [AFAB_SMPSS_M0_RESET] = { 0x20b8 }, 3374 [AFAB_SMPSS_M0_RESET] = { 0x20b8 },
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H A D | gcc-ipq806x.c | 2316 [AFAB_SMPSS_M0_RESET] = { 0x20b8, 0 },
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H A D | gcc-msm8660.c | 2586 [AFAB_SMPSS_M0_RESET] = { 0x20b8 },
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