1 /*
2  *  sn95031.c -  TI sn95031 Codec driver
3  *
4  *  Copyright (C) 2010 Intel Corp
5  *  Author: Vinod Koul <vinod.koul@intel.com>
6  *  Author: Harsha Priya <priya.harsha@intel.com>
7  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; version 2 of the License.
12  *
13  *  This program is distributed in the hope that it will be useful, but
14  *  WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  *  General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License along
19  *  with this program; if not, write to the Free Software Foundation, Inc.,
20  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21  *
22  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23  *
24  *
25  */
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 
28 #include <linux/platform_device.h>
29 #include <linux/delay.h>
30 #include <linux/slab.h>
31 #include <linux/module.h>
32 
33 #include <asm/intel_scu_ipc.h>
34 #include <sound/pcm.h>
35 #include <sound/pcm_params.h>
36 #include <sound/soc.h>
37 #include <sound/soc-dapm.h>
38 #include <sound/initval.h>
39 #include <sound/tlv.h>
40 #include <sound/jack.h>
41 #include "sn95031.h"
42 
43 #define SN95031_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100)
44 #define SN95031_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
45 
46 /* adc helper functions */
47 
48 /* enables mic bias voltage */
sn95031_enable_mic_bias(struct snd_soc_codec * codec)49 static void sn95031_enable_mic_bias(struct snd_soc_codec *codec)
50 {
51 	snd_soc_write(codec, SN95031_VAUD, BIT(2)|BIT(1)|BIT(0));
52 	snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(2), BIT(2));
53 }
54 
55 /* Enable/Disable the ADC depending on the argument */
configure_adc(struct snd_soc_codec * sn95031_codec,int val)56 static void configure_adc(struct snd_soc_codec *sn95031_codec, int val)
57 {
58 	int value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
59 
60 	if (val) {
61 		/* Enable and start the ADC */
62 		value |= (SN95031_ADC_ENBL | SN95031_ADC_START);
63 		value &= (~SN95031_ADC_NO_LOOP);
64 	} else {
65 		/* Just stop the ADC */
66 		value &= (~SN95031_ADC_START);
67 	}
68 	snd_soc_write(sn95031_codec, SN95031_ADC1CNTL1, value);
69 }
70 
71 /*
72  * finds an empty channel for conversion
73  * If the ADC is not enabled then start using 0th channel
74  * itself. Otherwise find an empty channel by looking for a
75  * channel in which the stopbit is set to 1. returns the index
76  * of the first free channel if succeeds or an error code.
77  *
78  * Context: can sleep
79  *
80  */
find_free_channel(struct snd_soc_codec * sn95031_codec)81 static int find_free_channel(struct snd_soc_codec *sn95031_codec)
82 {
83 	int i, value;
84 
85 	/* check whether ADC is enabled */
86 	value = snd_soc_read(sn95031_codec, SN95031_ADC1CNTL1);
87 
88 	if ((value & SN95031_ADC_ENBL) == 0)
89 		return 0;
90 
91 	/* ADC is already enabled; Looking for an empty channel */
92 	for (i = 0; i <	SN95031_ADC_CHANLS_MAX; i++) {
93 		value = snd_soc_read(sn95031_codec,
94 				SN95031_ADC_CHNL_START_ADDR + i);
95 		if (value & SN95031_STOPBIT_MASK)
96 			break;
97 	}
98 	return (i == SN95031_ADC_CHANLS_MAX) ? (-EINVAL) : i;
99 }
100 
101 /* Initialize the ADC for reading micbias values. Can sleep. */
sn95031_initialize_adc(struct snd_soc_codec * sn95031_codec)102 static int sn95031_initialize_adc(struct snd_soc_codec *sn95031_codec)
103 {
104 	int base_addr, chnl_addr;
105 	int value;
106 	int channel_index;
107 
108 	/* Index of the first channel in which the stop bit is set */
109 	channel_index = find_free_channel(sn95031_codec);
110 	if (channel_index < 0) {
111 		pr_err("No free ADC channels");
112 		return channel_index;
113 	}
114 
115 	base_addr = SN95031_ADC_CHNL_START_ADDR + channel_index;
116 
117 	if (!(channel_index == 0 || channel_index ==  SN95031_ADC_LOOP_MAX)) {
118 		/* Reset stop bit for channels other than 0 and 12 */
119 		value = snd_soc_read(sn95031_codec, base_addr);
120 		/* Set the stop bit to zero */
121 		snd_soc_write(sn95031_codec, base_addr, value & 0xEF);
122 		/* Index of the first free channel */
123 		base_addr++;
124 		channel_index++;
125 	}
126 
127 	/* Since this is the last channel, set the stop bit
128 	   to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
129 	snd_soc_write(sn95031_codec, base_addr,
130 				SN95031_AUDIO_DETECT_CODE | 0x10);
131 
132 	chnl_addr = SN95031_ADC_DATA_START_ADDR + 2 * channel_index;
133 	pr_debug("mid_initialize : %x", chnl_addr);
134 	configure_adc(sn95031_codec, 1);
135 	return chnl_addr;
136 }
137 
138 
139 /* reads the ADC registers and gets the mic bias value in mV. */
sn95031_get_mic_bias(struct snd_soc_codec * codec)140 static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec)
141 {
142 	u16 adc_adr = sn95031_initialize_adc(codec);
143 	u16 adc_val1, adc_val2;
144 	unsigned int mic_bias;
145 
146 	sn95031_enable_mic_bias(codec);
147 
148 	/* Enable the sound card for conversion before reading */
149 	snd_soc_write(codec, SN95031_ADC1CNTL3, 0x05);
150 	/* Re-toggle the RRDATARD bit */
151 	snd_soc_write(codec, SN95031_ADC1CNTL3, 0x04);
152 
153 	/* Read the higher bits of data */
154 	msleep(1000);
155 	adc_val1 = snd_soc_read(codec, adc_adr);
156 	adc_adr++;
157 	adc_val2 = snd_soc_read(codec, adc_adr);
158 
159 	/* Adding lower two bits to the higher bits */
160 	mic_bias = (adc_val1 << 2) + (adc_val2 & 3);
161 	mic_bias = (mic_bias * SN95031_ADC_ONE_LSB_MULTIPLIER) / 1000;
162 	pr_debug("mic bias = %dmV\n", mic_bias);
163 	return mic_bias;
164 }
165 /*end - adc helper functions */
166 
sn95031_read(void * ctx,unsigned int reg,unsigned int * val)167 static int sn95031_read(void *ctx, unsigned int reg, unsigned int *val)
168 {
169 	u8 value = 0;
170 	int ret;
171 
172 	ret = intel_scu_ipc_ioread8(reg, &value);
173 	if (ret == 0)
174 		*val = value;
175 
176 	return ret;
177 }
178 
sn95031_write(void * ctx,unsigned int reg,unsigned int value)179 static int sn95031_write(void *ctx, unsigned int reg, unsigned int value)
180 {
181 	return intel_scu_ipc_iowrite8(reg, value);
182 }
183 
184 static const struct regmap_config sn95031_regmap = {
185 	.reg_read = sn95031_read,
186 	.reg_write = sn95031_write,
187 };
188 
sn95031_set_vaud_bias(struct snd_soc_codec * codec,enum snd_soc_bias_level level)189 static int sn95031_set_vaud_bias(struct snd_soc_codec *codec,
190 		enum snd_soc_bias_level level)
191 {
192 	switch (level) {
193 	case SND_SOC_BIAS_ON:
194 		break;
195 
196 	case SND_SOC_BIAS_PREPARE:
197 		if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
198 			pr_debug("vaud_bias powering up pll\n");
199 			/* power up the pll */
200 			snd_soc_write(codec, SN95031_AUDPLLCTRL, BIT(5));
201 			/* enable pcm 2 */
202 			snd_soc_update_bits(codec, SN95031_PCM2C2,
203 					BIT(0), BIT(0));
204 		}
205 		break;
206 
207 	case SND_SOC_BIAS_STANDBY:
208 		if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
209 			pr_debug("vaud_bias power up rail\n");
210 			/* power up the rail */
211 			snd_soc_write(codec, SN95031_VAUD,
212 					BIT(2)|BIT(1)|BIT(0));
213 			msleep(1);
214 		} else if (codec->dapm.bias_level == SND_SOC_BIAS_PREPARE) {
215 			/* turn off pcm */
216 			pr_debug("vaud_bias power dn pcm\n");
217 			snd_soc_update_bits(codec, SN95031_PCM2C2, BIT(0), 0);
218 			snd_soc_write(codec, SN95031_AUDPLLCTRL, 0);
219 		}
220 		break;
221 
222 
223 	case SND_SOC_BIAS_OFF:
224 		pr_debug("vaud_bias _OFF doing rail shutdown\n");
225 		snd_soc_write(codec, SN95031_VAUD, BIT(3));
226 		break;
227 	}
228 
229 	codec->dapm.bias_level = level;
230 	return 0;
231 }
232 
sn95031_vhs_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)233 static int sn95031_vhs_event(struct snd_soc_dapm_widget *w,
234 		    struct snd_kcontrol *kcontrol, int event)
235 {
236 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
237 
238 	if (SND_SOC_DAPM_EVENT_ON(event)) {
239 		pr_debug("VHS SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
240 		/* power up the rail */
241 		snd_soc_write(codec, SN95031_VHSP, 0x3D);
242 		snd_soc_write(codec, SN95031_VHSN, 0x3F);
243 		msleep(1);
244 	} else if (SND_SOC_DAPM_EVENT_OFF(event)) {
245 		pr_debug("VHS SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
246 		snd_soc_write(codec, SN95031_VHSP, 0xC4);
247 		snd_soc_write(codec, SN95031_VHSN, 0x04);
248 	}
249 	return 0;
250 }
251 
sn95031_vihf_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)252 static int sn95031_vihf_event(struct snd_soc_dapm_widget *w,
253 		    struct snd_kcontrol *kcontrol, int event)
254 {
255 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
256 
257 	if (SND_SOC_DAPM_EVENT_ON(event)) {
258 		pr_debug("VIHF SND_SOC_DAPM_EVENT_ON doing rail startup now\n");
259 		/* power up the rail */
260 		snd_soc_write(codec, SN95031_VIHF, 0x27);
261 		msleep(1);
262 	} else if (SND_SOC_DAPM_EVENT_OFF(event)) {
263 		pr_debug("VIHF SND_SOC_DAPM_EVENT_OFF doing rail shutdown\n");
264 		snd_soc_write(codec, SN95031_VIHF, 0x24);
265 	}
266 	return 0;
267 }
268 
sn95031_dmic12_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)269 static int sn95031_dmic12_event(struct snd_soc_dapm_widget *w,
270 			struct snd_kcontrol *k, int event)
271 {
272 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
273 	unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
274 
275 	if (SND_SOC_DAPM_EVENT_ON(event)) {
276 		ldo = BIT(5)|BIT(4);
277 		clk_dir = BIT(0);
278 		data_dir = BIT(7);
279 	}
280 	/* program DMIC LDO, clock and set clock */
281 	snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
282 	snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(0), clk_dir);
283 	snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(7), data_dir);
284 	return 0;
285 }
286 
sn95031_dmic34_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)287 static int sn95031_dmic34_event(struct snd_soc_dapm_widget *w,
288 			struct snd_kcontrol *k, int event)
289 {
290 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
291 	unsigned int ldo = 0, clk_dir = 0, data_dir = 0;
292 
293 	if (SND_SOC_DAPM_EVENT_ON(event)) {
294 		ldo = BIT(5)|BIT(4);
295 		clk_dir = BIT(2);
296 		data_dir = BIT(1);
297 	}
298 	/* program DMIC LDO, clock and set clock */
299 	snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(5)|BIT(4), ldo);
300 	snd_soc_update_bits(codec, SN95031_DMICBUF0123, BIT(2), clk_dir);
301 	snd_soc_update_bits(codec, SN95031_DMICBUF45, BIT(1), data_dir);
302 	return 0;
303 }
304 
sn95031_dmic56_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)305 static int sn95031_dmic56_event(struct snd_soc_dapm_widget *w,
306 			struct snd_kcontrol *k, int event)
307 {
308 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
309 	unsigned int ldo = 0;
310 
311 	if (SND_SOC_DAPM_EVENT_ON(event))
312 		ldo = BIT(7)|BIT(6);
313 
314 	/* program DMIC LDO */
315 	snd_soc_update_bits(codec, SN95031_MICBIAS, BIT(7)|BIT(6), ldo);
316 	return 0;
317 }
318 
319 /* mux controls */
320 static const char *sn95031_mic_texts[] = { "AMIC", "LineIn" };
321 
322 static SOC_ENUM_SINGLE_DECL(sn95031_micl_enum,
323 			    SN95031_ADCCONFIG, 1, sn95031_mic_texts);
324 
325 static const struct snd_kcontrol_new sn95031_micl_mux_control =
326 	SOC_DAPM_ENUM("Route", sn95031_micl_enum);
327 
328 static SOC_ENUM_SINGLE_DECL(sn95031_micr_enum,
329 			    SN95031_ADCCONFIG, 3, sn95031_mic_texts);
330 
331 static const struct snd_kcontrol_new sn95031_micr_mux_control =
332 	SOC_DAPM_ENUM("Route", sn95031_micr_enum);
333 
334 static const char *sn95031_input_texts[] = {	"DMIC1", "DMIC2", "DMIC3",
335 						"DMIC4", "DMIC5", "DMIC6",
336 						"ADC Left", "ADC Right" };
337 
338 static SOC_ENUM_SINGLE_DECL(sn95031_input1_enum,
339 			    SN95031_AUDIOMUX12, 0, sn95031_input_texts);
340 
341 static const struct snd_kcontrol_new sn95031_input1_mux_control =
342 	SOC_DAPM_ENUM("Route", sn95031_input1_enum);
343 
344 static SOC_ENUM_SINGLE_DECL(sn95031_input2_enum,
345 			    SN95031_AUDIOMUX12, 4, sn95031_input_texts);
346 
347 static const struct snd_kcontrol_new sn95031_input2_mux_control =
348 	SOC_DAPM_ENUM("Route", sn95031_input2_enum);
349 
350 static SOC_ENUM_SINGLE_DECL(sn95031_input3_enum,
351 			    SN95031_AUDIOMUX34, 0, sn95031_input_texts);
352 
353 static const struct snd_kcontrol_new sn95031_input3_mux_control =
354 	SOC_DAPM_ENUM("Route", sn95031_input3_enum);
355 
356 static SOC_ENUM_SINGLE_DECL(sn95031_input4_enum,
357 			    SN95031_AUDIOMUX34, 4, sn95031_input_texts);
358 
359 static const struct snd_kcontrol_new sn95031_input4_mux_control =
360 	SOC_DAPM_ENUM("Route", sn95031_input4_enum);
361 
362 /* capture path controls */
363 
364 static const char *sn95031_micmode_text[] = {"Single Ended", "Differential"};
365 
366 /* 0dB to 30dB in 10dB steps */
367 static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 10, 0);
368 
369 static SOC_ENUM_SINGLE_DECL(sn95031_micmode1_enum,
370 			    SN95031_MICAMP1, 1, sn95031_micmode_text);
371 static SOC_ENUM_SINGLE_DECL(sn95031_micmode2_enum,
372 			    SN95031_MICAMP2, 1, sn95031_micmode_text);
373 
374 static const char *sn95031_dmic_cfg_text[] = {"GPO", "DMIC"};
375 
376 static SOC_ENUM_SINGLE_DECL(sn95031_dmic12_cfg_enum,
377 			    SN95031_DMICMUX, 0, sn95031_dmic_cfg_text);
378 static SOC_ENUM_SINGLE_DECL(sn95031_dmic34_cfg_enum,
379 			    SN95031_DMICMUX, 1, sn95031_dmic_cfg_text);
380 static SOC_ENUM_SINGLE_DECL(sn95031_dmic56_cfg_enum,
381 			    SN95031_DMICMUX, 2, sn95031_dmic_cfg_text);
382 
383 static const struct snd_kcontrol_new sn95031_snd_controls[] = {
384 	SOC_ENUM("Mic1Mode Capture Route", sn95031_micmode1_enum),
385 	SOC_ENUM("Mic2Mode Capture Route", sn95031_micmode2_enum),
386 	SOC_ENUM("DMIC12 Capture Route", sn95031_dmic12_cfg_enum),
387 	SOC_ENUM("DMIC34 Capture Route", sn95031_dmic34_cfg_enum),
388 	SOC_ENUM("DMIC56 Capture Route", sn95031_dmic56_cfg_enum),
389 	SOC_SINGLE_TLV("Mic1 Capture Volume", SN95031_MICAMP1,
390 			2, 4, 0, mic_tlv),
391 	SOC_SINGLE_TLV("Mic2 Capture Volume", SN95031_MICAMP2,
392 			2, 4, 0, mic_tlv),
393 };
394 
395 /* DAPM widgets */
396 static const struct snd_soc_dapm_widget sn95031_dapm_widgets[] = {
397 
398 	/* all end points mic, hs etc */
399 	SND_SOC_DAPM_OUTPUT("HPOUTL"),
400 	SND_SOC_DAPM_OUTPUT("HPOUTR"),
401 	SND_SOC_DAPM_OUTPUT("EPOUT"),
402 	SND_SOC_DAPM_OUTPUT("IHFOUTL"),
403 	SND_SOC_DAPM_OUTPUT("IHFOUTR"),
404 	SND_SOC_DAPM_OUTPUT("LINEOUTL"),
405 	SND_SOC_DAPM_OUTPUT("LINEOUTR"),
406 	SND_SOC_DAPM_OUTPUT("VIB1OUT"),
407 	SND_SOC_DAPM_OUTPUT("VIB2OUT"),
408 
409 	SND_SOC_DAPM_INPUT("AMIC1"), /* headset mic */
410 	SND_SOC_DAPM_INPUT("AMIC2"),
411 	SND_SOC_DAPM_INPUT("DMIC1"),
412 	SND_SOC_DAPM_INPUT("DMIC2"),
413 	SND_SOC_DAPM_INPUT("DMIC3"),
414 	SND_SOC_DAPM_INPUT("DMIC4"),
415 	SND_SOC_DAPM_INPUT("DMIC5"),
416 	SND_SOC_DAPM_INPUT("DMIC6"),
417 	SND_SOC_DAPM_INPUT("LINEINL"),
418 	SND_SOC_DAPM_INPUT("LINEINR"),
419 
420 	SND_SOC_DAPM_MICBIAS("AMIC1Bias", SN95031_MICBIAS, 2, 0),
421 	SND_SOC_DAPM_MICBIAS("AMIC2Bias", SN95031_MICBIAS, 3, 0),
422 	SND_SOC_DAPM_MICBIAS("DMIC12Bias", SN95031_DMICMUX, 3, 0),
423 	SND_SOC_DAPM_MICBIAS("DMIC34Bias", SN95031_DMICMUX, 4, 0),
424 	SND_SOC_DAPM_MICBIAS("DMIC56Bias", SN95031_DMICMUX, 5, 0),
425 
426 	SND_SOC_DAPM_SUPPLY("DMIC12supply", SN95031_DMICLK, 0, 0,
427 				sn95031_dmic12_event,
428 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
429 	SND_SOC_DAPM_SUPPLY("DMIC34supply", SN95031_DMICLK, 1, 0,
430 				sn95031_dmic34_event,
431 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
432 	SND_SOC_DAPM_SUPPLY("DMIC56supply", SN95031_DMICLK, 2, 0,
433 				sn95031_dmic56_event,
434 				SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
435 
436 	SND_SOC_DAPM_AIF_OUT("PCM_Out", "Capture", 0,
437 			SND_SOC_NOPM, 0, 0),
438 
439 	SND_SOC_DAPM_SUPPLY("Headset Rail", SND_SOC_NOPM, 0, 0,
440 			sn95031_vhs_event,
441 			SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
442 	SND_SOC_DAPM_SUPPLY("Speaker Rail", SND_SOC_NOPM, 0, 0,
443 			sn95031_vihf_event,
444 			SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
445 
446 	/* playback path driver enables */
447 	SND_SOC_DAPM_PGA("Headset Left Playback",
448 			SN95031_DRIVEREN, 0, 0, NULL, 0),
449 	SND_SOC_DAPM_PGA("Headset Right Playback",
450 			SN95031_DRIVEREN, 1, 0, NULL, 0),
451 	SND_SOC_DAPM_PGA("Speaker Left Playback",
452 			SN95031_DRIVEREN, 2, 0, NULL, 0),
453 	SND_SOC_DAPM_PGA("Speaker Right Playback",
454 			SN95031_DRIVEREN, 3, 0, NULL, 0),
455 	SND_SOC_DAPM_PGA("Vibra1 Playback",
456 			SN95031_DRIVEREN, 4, 0, NULL, 0),
457 	SND_SOC_DAPM_PGA("Vibra2 Playback",
458 			SN95031_DRIVEREN, 5, 0, NULL, 0),
459 	SND_SOC_DAPM_PGA("Earpiece Playback",
460 			SN95031_DRIVEREN, 6, 0, NULL, 0),
461 	SND_SOC_DAPM_PGA("Lineout Left Playback",
462 			SN95031_LOCTL, 0, 0, NULL, 0),
463 	SND_SOC_DAPM_PGA("Lineout Right Playback",
464 			SN95031_LOCTL, 4, 0, NULL, 0),
465 
466 	/* playback path filter enable */
467 	SND_SOC_DAPM_PGA("Headset Left Filter",
468 			SN95031_HSEPRXCTRL, 4, 0, NULL, 0),
469 	SND_SOC_DAPM_PGA("Headset Right Filter",
470 			SN95031_HSEPRXCTRL, 5, 0,  NULL, 0),
471 	SND_SOC_DAPM_PGA("Speaker Left Filter",
472 			SN95031_IHFRXCTRL, 0, 0,  NULL, 0),
473 	SND_SOC_DAPM_PGA("Speaker Right Filter",
474 			SN95031_IHFRXCTRL, 1, 0,  NULL, 0),
475 
476 	/* DACs */
477 	SND_SOC_DAPM_DAC("HSDAC Left", "Headset",
478 			SN95031_DACCONFIG, 0, 0),
479 	SND_SOC_DAPM_DAC("HSDAC Right", "Headset",
480 			SN95031_DACCONFIG, 1, 0),
481 	SND_SOC_DAPM_DAC("IHFDAC Left", "Speaker",
482 			SN95031_DACCONFIG, 2, 0),
483 	SND_SOC_DAPM_DAC("IHFDAC Right", "Speaker",
484 			SN95031_DACCONFIG, 3, 0),
485 	SND_SOC_DAPM_DAC("Vibra1 DAC", "Vibra1",
486 			SN95031_VIB1C5, 1, 0),
487 	SND_SOC_DAPM_DAC("Vibra2 DAC", "Vibra2",
488 			SN95031_VIB2C5, 1, 0),
489 
490 	/* capture widgets */
491 	SND_SOC_DAPM_PGA("LineIn Enable Left", SN95031_MICAMP1,
492 				7, 0, NULL, 0),
493 	SND_SOC_DAPM_PGA("LineIn Enable Right", SN95031_MICAMP2,
494 				7, 0, NULL, 0),
495 
496 	SND_SOC_DAPM_PGA("MIC1 Enable", SN95031_MICAMP1, 0, 0, NULL, 0),
497 	SND_SOC_DAPM_PGA("MIC2 Enable", SN95031_MICAMP2, 0, 0, NULL, 0),
498 	SND_SOC_DAPM_PGA("TX1 Enable", SN95031_AUDIOTXEN, 2, 0, NULL, 0),
499 	SND_SOC_DAPM_PGA("TX2 Enable", SN95031_AUDIOTXEN, 3, 0, NULL, 0),
500 	SND_SOC_DAPM_PGA("TX3 Enable", SN95031_AUDIOTXEN, 4, 0, NULL, 0),
501 	SND_SOC_DAPM_PGA("TX4 Enable", SN95031_AUDIOTXEN, 5, 0, NULL, 0),
502 
503 	/* ADC have null stream as they will be turned ON by TX path */
504 	SND_SOC_DAPM_ADC("ADC Left", NULL,
505 			SN95031_ADCCONFIG, 0, 0),
506 	SND_SOC_DAPM_ADC("ADC Right", NULL,
507 			SN95031_ADCCONFIG, 2, 0),
508 
509 	SND_SOC_DAPM_MUX("Mic_InputL Capture Route",
510 			SND_SOC_NOPM, 0, 0, &sn95031_micl_mux_control),
511 	SND_SOC_DAPM_MUX("Mic_InputR Capture Route",
512 			SND_SOC_NOPM, 0, 0, &sn95031_micr_mux_control),
513 
514 	SND_SOC_DAPM_MUX("Txpath1 Capture Route",
515 			SND_SOC_NOPM, 0, 0, &sn95031_input1_mux_control),
516 	SND_SOC_DAPM_MUX("Txpath2 Capture Route",
517 			SND_SOC_NOPM, 0, 0, &sn95031_input2_mux_control),
518 	SND_SOC_DAPM_MUX("Txpath3 Capture Route",
519 			SND_SOC_NOPM, 0, 0, &sn95031_input3_mux_control),
520 	SND_SOC_DAPM_MUX("Txpath4 Capture Route",
521 			SND_SOC_NOPM, 0, 0, &sn95031_input4_mux_control),
522 
523 };
524 
525 static const struct snd_soc_dapm_route sn95031_audio_map[] = {
526 	/* headset and earpiece map */
527 	{ "HPOUTL", NULL, "Headset Rail"},
528 	{ "HPOUTR", NULL, "Headset Rail"},
529 	{ "HPOUTL", NULL, "Headset Left Playback" },
530 	{ "HPOUTR", NULL, "Headset Right Playback" },
531 	{ "EPOUT", NULL, "Earpiece Playback" },
532 	{ "Headset Left Playback", NULL, "Headset Left Filter"},
533 	{ "Headset Right Playback", NULL, "Headset Right Filter"},
534 	{ "Earpiece Playback", NULL, "Headset Left Filter"},
535 	{ "Headset Left Filter", NULL, "HSDAC Left"},
536 	{ "Headset Right Filter", NULL, "HSDAC Right"},
537 
538 	/* speaker map */
539 	{ "IHFOUTL", NULL, "Speaker Rail"},
540 	{ "IHFOUTR", NULL, "Speaker Rail"},
541 	{ "IHFOUTL", NULL, "Speaker Left Playback"},
542 	{ "IHFOUTR", NULL, "Speaker Right Playback"},
543 	{ "Speaker Left Playback", NULL, "Speaker Left Filter"},
544 	{ "Speaker Right Playback", NULL, "Speaker Right Filter"},
545 	{ "Speaker Left Filter", NULL, "IHFDAC Left"},
546 	{ "Speaker Right Filter", NULL, "IHFDAC Right"},
547 
548 	/* vibra map */
549 	{ "VIB1OUT", NULL, "Vibra1 Playback"},
550 	{ "Vibra1 Playback", NULL, "Vibra1 DAC"},
551 
552 	{ "VIB2OUT", NULL, "Vibra2 Playback"},
553 	{ "Vibra2 Playback", NULL, "Vibra2 DAC"},
554 
555 	/* lineout */
556 	{ "LINEOUTL", NULL, "Lineout Left Playback"},
557 	{ "LINEOUTR", NULL, "Lineout Right Playback"},
558 	{ "Lineout Left Playback", NULL, "Headset Left Filter"},
559 	{ "Lineout Left Playback", NULL, "Speaker Left Filter"},
560 	{ "Lineout Left Playback", NULL, "Vibra1 DAC"},
561 	{ "Lineout Right Playback", NULL, "Headset Right Filter"},
562 	{ "Lineout Right Playback", NULL, "Speaker Right Filter"},
563 	{ "Lineout Right Playback", NULL, "Vibra2 DAC"},
564 
565 	/* Headset (AMIC1) mic */
566 	{ "AMIC1Bias", NULL, "AMIC1"},
567 	{ "MIC1 Enable", NULL, "AMIC1Bias"},
568 	{ "Mic_InputL Capture Route", "AMIC", "MIC1 Enable"},
569 
570 	/* AMIC2 */
571 	{ "AMIC2Bias", NULL, "AMIC2"},
572 	{ "MIC2 Enable", NULL, "AMIC2Bias"},
573 	{ "Mic_InputR Capture Route", "AMIC", "MIC2 Enable"},
574 
575 
576 	/* Linein */
577 	{ "LineIn Enable Left", NULL, "LINEINL"},
578 	{ "LineIn Enable Right", NULL, "LINEINR"},
579 	{ "Mic_InputL Capture Route", "LineIn", "LineIn Enable Left"},
580 	{ "Mic_InputR Capture Route", "LineIn", "LineIn Enable Right"},
581 
582 	/* ADC connection */
583 	{ "ADC Left", NULL, "Mic_InputL Capture Route"},
584 	{ "ADC Right", NULL, "Mic_InputR Capture Route"},
585 
586 	/*DMIC connections */
587 	{ "DMIC1", NULL, "DMIC12supply"},
588 	{ "DMIC2", NULL, "DMIC12supply"},
589 	{ "DMIC3", NULL, "DMIC34supply"},
590 	{ "DMIC4", NULL, "DMIC34supply"},
591 	{ "DMIC5", NULL, "DMIC56supply"},
592 	{ "DMIC6", NULL, "DMIC56supply"},
593 
594 	{ "DMIC12Bias", NULL, "DMIC1"},
595 	{ "DMIC12Bias", NULL, "DMIC2"},
596 	{ "DMIC34Bias", NULL, "DMIC3"},
597 	{ "DMIC34Bias", NULL, "DMIC4"},
598 	{ "DMIC56Bias", NULL, "DMIC5"},
599 	{ "DMIC56Bias", NULL, "DMIC6"},
600 
601 	/*TX path inputs*/
602 	{ "Txpath1 Capture Route", "ADC Left", "ADC Left"},
603 	{ "Txpath2 Capture Route", "ADC Left", "ADC Left"},
604 	{ "Txpath3 Capture Route", "ADC Left", "ADC Left"},
605 	{ "Txpath4 Capture Route", "ADC Left", "ADC Left"},
606 	{ "Txpath1 Capture Route", "ADC Right", "ADC Right"},
607 	{ "Txpath2 Capture Route", "ADC Right", "ADC Right"},
608 	{ "Txpath3 Capture Route", "ADC Right", "ADC Right"},
609 	{ "Txpath4 Capture Route", "ADC Right", "ADC Right"},
610 	{ "Txpath1 Capture Route", "DMIC1", "DMIC1"},
611 	{ "Txpath2 Capture Route", "DMIC1", "DMIC1"},
612 	{ "Txpath3 Capture Route", "DMIC1", "DMIC1"},
613 	{ "Txpath4 Capture Route", "DMIC1", "DMIC1"},
614 	{ "Txpath1 Capture Route", "DMIC2", "DMIC2"},
615 	{ "Txpath2 Capture Route", "DMIC2", "DMIC2"},
616 	{ "Txpath3 Capture Route", "DMIC2", "DMIC2"},
617 	{ "Txpath4 Capture Route", "DMIC2", "DMIC2"},
618 	{ "Txpath1 Capture Route", "DMIC3", "DMIC3"},
619 	{ "Txpath2 Capture Route", "DMIC3", "DMIC3"},
620 	{ "Txpath3 Capture Route", "DMIC3", "DMIC3"},
621 	{ "Txpath4 Capture Route", "DMIC3", "DMIC3"},
622 	{ "Txpath1 Capture Route", "DMIC4", "DMIC4"},
623 	{ "Txpath2 Capture Route", "DMIC4", "DMIC4"},
624 	{ "Txpath3 Capture Route", "DMIC4", "DMIC4"},
625 	{ "Txpath4 Capture Route", "DMIC4", "DMIC4"},
626 	{ "Txpath1 Capture Route", "DMIC5", "DMIC5"},
627 	{ "Txpath2 Capture Route", "DMIC5", "DMIC5"},
628 	{ "Txpath3 Capture Route", "DMIC5", "DMIC5"},
629 	{ "Txpath4 Capture Route", "DMIC5", "DMIC5"},
630 	{ "Txpath1 Capture Route", "DMIC6", "DMIC6"},
631 	{ "Txpath2 Capture Route", "DMIC6", "DMIC6"},
632 	{ "Txpath3 Capture Route", "DMIC6", "DMIC6"},
633 	{ "Txpath4 Capture Route", "DMIC6", "DMIC6"},
634 
635 	/* tx path */
636 	{ "TX1 Enable", NULL, "Txpath1 Capture Route"},
637 	{ "TX2 Enable", NULL, "Txpath2 Capture Route"},
638 	{ "TX3 Enable", NULL, "Txpath3 Capture Route"},
639 	{ "TX4 Enable", NULL, "Txpath4 Capture Route"},
640 	{ "PCM_Out", NULL, "TX1 Enable"},
641 	{ "PCM_Out", NULL, "TX2 Enable"},
642 	{ "PCM_Out", NULL, "TX3 Enable"},
643 	{ "PCM_Out", NULL, "TX4 Enable"},
644 
645 };
646 
647 /* speaker and headset mutes, for audio pops and clicks */
sn95031_pcm_hs_mute(struct snd_soc_dai * dai,int mute)648 static int sn95031_pcm_hs_mute(struct snd_soc_dai *dai, int mute)
649 {
650 	snd_soc_update_bits(dai->codec,
651 			SN95031_HSLVOLCTRL, BIT(7), (!mute << 7));
652 	snd_soc_update_bits(dai->codec,
653 			SN95031_HSRVOLCTRL, BIT(7), (!mute << 7));
654 	return 0;
655 }
656 
sn95031_pcm_spkr_mute(struct snd_soc_dai * dai,int mute)657 static int sn95031_pcm_spkr_mute(struct snd_soc_dai *dai, int mute)
658 {
659 	snd_soc_update_bits(dai->codec,
660 			SN95031_IHFLVOLCTRL, BIT(7), (!mute << 7));
661 	snd_soc_update_bits(dai->codec,
662 			SN95031_IHFRVOLCTRL, BIT(7), (!mute << 7));
663 	return 0;
664 }
665 
sn95031_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)666 static int sn95031_pcm_hw_params(struct snd_pcm_substream *substream,
667 		struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
668 {
669 	unsigned int format, rate;
670 
671 	switch (params_width(params)) {
672 	case 16:
673 		format = BIT(4)|BIT(5);
674 		break;
675 
676 	case 24:
677 		format = 0;
678 		break;
679 	default:
680 		return -EINVAL;
681 	}
682 	snd_soc_update_bits(dai->codec, SN95031_PCM2C2,
683 			BIT(4)|BIT(5), format);
684 
685 	switch (params_rate(params)) {
686 	case 48000:
687 		pr_debug("RATE_48000\n");
688 		rate = 0;
689 		break;
690 
691 	case 44100:
692 		pr_debug("RATE_44100\n");
693 		rate = BIT(7);
694 		break;
695 
696 	default:
697 		pr_err("ERR rate %d\n", params_rate(params));
698 		return -EINVAL;
699 	}
700 	snd_soc_update_bits(dai->codec, SN95031_PCM1C1, BIT(7), rate);
701 
702 	return 0;
703 }
704 
705 /* Codec DAI section */
706 static const struct snd_soc_dai_ops sn95031_headset_dai_ops = {
707 	.digital_mute	= sn95031_pcm_hs_mute,
708 	.hw_params	= sn95031_pcm_hw_params,
709 };
710 
711 static const struct snd_soc_dai_ops sn95031_speaker_dai_ops = {
712 	.digital_mute	= sn95031_pcm_spkr_mute,
713 	.hw_params	= sn95031_pcm_hw_params,
714 };
715 
716 static const struct snd_soc_dai_ops sn95031_vib1_dai_ops = {
717 	.hw_params	= sn95031_pcm_hw_params,
718 };
719 
720 static const struct snd_soc_dai_ops sn95031_vib2_dai_ops = {
721 	.hw_params	= sn95031_pcm_hw_params,
722 };
723 
724 static struct snd_soc_dai_driver sn95031_dais[] = {
725 {
726 	.name = "SN95031 Headset",
727 	.playback = {
728 		.stream_name = "Headset",
729 		.channels_min = 2,
730 		.channels_max = 2,
731 		.rates = SN95031_RATES,
732 		.formats = SN95031_FORMATS,
733 	},
734 	.capture = {
735 		.stream_name = "Capture",
736 		.channels_min = 1,
737 		.channels_max = 5,
738 		.rates = SN95031_RATES,
739 		.formats = SN95031_FORMATS,
740 	},
741 	.ops = &sn95031_headset_dai_ops,
742 },
743 {	.name = "SN95031 Speaker",
744 	.playback = {
745 		.stream_name = "Speaker",
746 		.channels_min = 2,
747 		.channels_max = 2,
748 		.rates = SN95031_RATES,
749 		.formats = SN95031_FORMATS,
750 	},
751 	.ops = &sn95031_speaker_dai_ops,
752 },
753 {	.name = "SN95031 Vibra1",
754 	.playback = {
755 		.stream_name = "Vibra1",
756 		.channels_min = 1,
757 		.channels_max = 1,
758 		.rates = SN95031_RATES,
759 		.formats = SN95031_FORMATS,
760 	},
761 	.ops = &sn95031_vib1_dai_ops,
762 },
763 {	.name = "SN95031 Vibra2",
764 	.playback = {
765 		.stream_name = "Vibra2",
766 		.channels_min = 1,
767 		.channels_max = 1,
768 		.rates = SN95031_RATES,
769 		.formats = SN95031_FORMATS,
770 	},
771 	.ops = &sn95031_vib2_dai_ops,
772 },
773 };
774 
sn95031_disable_jack_btn(struct snd_soc_codec * codec)775 static inline void sn95031_disable_jack_btn(struct snd_soc_codec *codec)
776 {
777 	snd_soc_write(codec, SN95031_BTNCTRL2, 0x00);
778 }
779 
sn95031_enable_jack_btn(struct snd_soc_codec * codec)780 static inline void sn95031_enable_jack_btn(struct snd_soc_codec *codec)
781 {
782 	snd_soc_write(codec, SN95031_BTNCTRL1, 0x77);
783 	snd_soc_write(codec, SN95031_BTNCTRL2, 0x01);
784 }
785 
sn95031_get_headset_state(struct snd_soc_codec * codec,struct snd_soc_jack * mfld_jack)786 static int sn95031_get_headset_state(struct snd_soc_codec *codec,
787 	struct snd_soc_jack *mfld_jack)
788 {
789 	int micbias = sn95031_get_mic_bias(codec);
790 
791 	int jack_type = snd_soc_jack_get_type(mfld_jack, micbias);
792 
793 	pr_debug("jack type detected = %d\n", jack_type);
794 	if (jack_type == SND_JACK_HEADSET)
795 		sn95031_enable_jack_btn(codec);
796 	return jack_type;
797 }
798 
sn95031_jack_detection(struct snd_soc_codec * codec,struct mfld_jack_data * jack_data)799 void sn95031_jack_detection(struct snd_soc_codec *codec,
800 	struct mfld_jack_data *jack_data)
801 {
802 	unsigned int status;
803 	unsigned int mask = SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_HEADSET;
804 
805 	pr_debug("interrupt id read in sram = 0x%x\n", jack_data->intr_id);
806 	if (jack_data->intr_id & 0x1) {
807 		pr_debug("short_push detected\n");
808 		status = SND_JACK_HEADSET | SND_JACK_BTN_0;
809 	} else if (jack_data->intr_id & 0x2) {
810 		pr_debug("long_push detected\n");
811 		status = SND_JACK_HEADSET | SND_JACK_BTN_1;
812 	} else if (jack_data->intr_id & 0x4) {
813 		pr_debug("headset or headphones inserted\n");
814 		status = sn95031_get_headset_state(codec, jack_data->mfld_jack);
815 	} else if (jack_data->intr_id & 0x8) {
816 		pr_debug("headset or headphones removed\n");
817 		status = 0;
818 		sn95031_disable_jack_btn(codec);
819 	} else {
820 		pr_err("unidentified interrupt\n");
821 		return;
822 	}
823 
824 	snd_soc_jack_report(jack_data->mfld_jack, status, mask);
825 	/*button pressed and released so we send explicit button release */
826 	if ((status & SND_JACK_BTN_0) | (status & SND_JACK_BTN_1))
827 		snd_soc_jack_report(jack_data->mfld_jack,
828 				SND_JACK_HEADSET, mask);
829 }
830 EXPORT_SYMBOL_GPL(sn95031_jack_detection);
831 
832 /* codec registration */
sn95031_codec_probe(struct snd_soc_codec * codec)833 static int sn95031_codec_probe(struct snd_soc_codec *codec)
834 {
835 	pr_debug("codec_probe called\n");
836 
837 	/* PCM interface config
838 	 * This sets the pcm rx slot conguration to max 6 slots
839 	 * for max 4 dais (2 stereo and 2 mono)
840 	 */
841 	snd_soc_write(codec, SN95031_PCM2RXSLOT01, 0x10);
842 	snd_soc_write(codec, SN95031_PCM2RXSLOT23, 0x32);
843 	snd_soc_write(codec, SN95031_PCM2RXSLOT45, 0x54);
844 	snd_soc_write(codec, SN95031_PCM2TXSLOT01, 0x10);
845 	snd_soc_write(codec, SN95031_PCM2TXSLOT23, 0x32);
846 	/* pcm port setting
847 	 * This sets the pcm port to slave and clock at 19.2Mhz which
848 	 * can support 6slots, sampling rate set per stream in hw-params
849 	 */
850 	snd_soc_write(codec, SN95031_PCM1C1, 0x00);
851 	snd_soc_write(codec, SN95031_PCM2C1, 0x01);
852 	snd_soc_write(codec, SN95031_PCM2C2, 0x0A);
853 	snd_soc_write(codec, SN95031_HSMIXER, BIT(0)|BIT(4));
854 	/* vendor vibra workround, the vibras are muted by
855 	 * custom register so unmute them
856 	 */
857 	snd_soc_write(codec, SN95031_SSR5, 0x80);
858 	snd_soc_write(codec, SN95031_SSR6, 0x80);
859 	snd_soc_write(codec, SN95031_VIB1C5, 0x00);
860 	snd_soc_write(codec, SN95031_VIB2C5, 0x00);
861 	/* configure vibras for pcm port */
862 	snd_soc_write(codec, SN95031_VIB1C3, 0x00);
863 	snd_soc_write(codec, SN95031_VIB2C3, 0x00);
864 
865 	/* soft mute ramp time */
866 	snd_soc_write(codec, SN95031_SOFTMUTE, 0x3);
867 	/* fix the initial volume at 1dB,
868 	 * default in +9dB,
869 	 * 1dB give optimal swing on DAC, amps
870 	 */
871 	snd_soc_write(codec, SN95031_HSLVOLCTRL, 0x08);
872 	snd_soc_write(codec, SN95031_HSRVOLCTRL, 0x08);
873 	snd_soc_write(codec, SN95031_IHFLVOLCTRL, 0x08);
874 	snd_soc_write(codec, SN95031_IHFRVOLCTRL, 0x08);
875 	/* dac mode and lineout workaround */
876 	snd_soc_write(codec, SN95031_SSR2, 0x10);
877 	snd_soc_write(codec, SN95031_SSR3, 0x40);
878 
879 	return 0;
880 }
881 
882 static struct snd_soc_codec_driver sn95031_codec = {
883 	.probe		= sn95031_codec_probe,
884 	.set_bias_level	= sn95031_set_vaud_bias,
885 	.idle_bias_off	= true,
886 
887 	.controls	= sn95031_snd_controls,
888 	.num_controls	= ARRAY_SIZE(sn95031_snd_controls),
889 	.dapm_widgets	= sn95031_dapm_widgets,
890 	.num_dapm_widgets	= ARRAY_SIZE(sn95031_dapm_widgets),
891 	.dapm_routes	= sn95031_audio_map,
892 	.num_dapm_routes	= ARRAY_SIZE(sn95031_audio_map),
893 };
894 
sn95031_device_probe(struct platform_device * pdev)895 static int sn95031_device_probe(struct platform_device *pdev)
896 {
897 	struct regmap *regmap;
898 
899 	pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev));
900 
901 	regmap = devm_regmap_init(&pdev->dev, NULL, NULL, &sn95031_regmap);
902 	if (IS_ERR(regmap))
903 		return PTR_ERR(regmap);
904 
905 	return snd_soc_register_codec(&pdev->dev, &sn95031_codec,
906 			sn95031_dais, ARRAY_SIZE(sn95031_dais));
907 }
908 
sn95031_device_remove(struct platform_device * pdev)909 static int sn95031_device_remove(struct platform_device *pdev)
910 {
911 	pr_debug("codec device remove called\n");
912 	snd_soc_unregister_codec(&pdev->dev);
913 	return 0;
914 }
915 
916 static struct platform_driver sn95031_codec_driver = {
917 	.driver		= {
918 		.name		= "sn95031",
919 	},
920 	.probe		= sn95031_device_probe,
921 	.remove		= sn95031_device_remove,
922 };
923 
924 module_platform_driver(sn95031_codec_driver);
925 
926 MODULE_DESCRIPTION("ASoC TI SN95031 codec driver");
927 MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
928 MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
929 MODULE_LICENSE("GPL v2");
930 MODULE_ALIAS("platform:sn95031");
931