1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
67 #include <linux/kernel.h>
68 #include <linux/string.h>
69 #include <linux/errno.h>
70 #include <linux/ioport.h>
71 #include <linux/slab.h>
72 #include <linux/interrupt.h>
73 #include <linux/timer.h>
74 #include <linux/pci.h>
75 #include <linux/spinlock.h>
76 #include <linux/init.h>
77 #include <linux/bitops.h>
78 #include <linux/io.h>
79 #include <linux/netdevice.h>
80 #include <linux/crc32.h>
81 #include <linux/etherdevice.h>
82 #include <linux/skbuff.h>
83 #include <linux/delay.h>
84 #include <linux/seq_file.h>
85 #include <linux/kthread.h>
86 #include <linux/module.h>
87
88 #include <linux/firmware.h>
89 #include <linux/types.h>
90 #include <linux/dma-mapping.h>
91 #include <linux/mii.h>
92 #include <linux/if_vlan.h>
93 #include <asm/unaligned.h>
94
95 #include <linux/ethtool.h>
96 #include <linux/uaccess.h>
97 #include "slichw.h"
98 #include "slic.h"
99
100 static uint slic_first_init = 1;
101 static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
102
103 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
104
105 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
106 static int intagg_delay = 100;
107 static u32 dynamic_intagg;
108 static unsigned int rcv_count;
109
110 #define DRV_NAME "slicoss"
111 #define DRV_VERSION "2.0.1"
112 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
113 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
114 "Non-Accelerated Driver"
115 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
116 "All rights reserved."
117 #define PFX DRV_NAME " "
118
119 MODULE_AUTHOR(DRV_AUTHOR);
120 MODULE_DESCRIPTION(DRV_DESCRIPTION);
121 MODULE_LICENSE("Dual BSD/GPL");
122
123 module_param(dynamic_intagg, int, 0);
124 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
125 module_param(intagg_delay, int, 0);
126 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
127
128 static const struct pci_device_id slic_pci_tbl[] = {
129 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
130 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
131 { 0 }
132 };
133
134 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
135
slic_reg32_write(void __iomem * reg,u32 value,bool flush)136 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
137 {
138 writel(value, reg);
139 if (flush)
140 mb();
141 }
142
slic_reg64_write(struct adapter * adapter,void __iomem * reg,u32 value,void __iomem * regh,u32 paddrh,bool flush)143 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
144 u32 value, void __iomem *regh, u32 paddrh,
145 bool flush)
146 {
147 spin_lock_irqsave(&adapter->bit64reglock.lock,
148 adapter->bit64reglock.flags);
149 if (paddrh != adapter->curaddrupper) {
150 adapter->curaddrupper = paddrh;
151 writel(paddrh, regh);
152 }
153 writel(value, reg);
154 if (flush)
155 mb();
156 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
157 adapter->bit64reglock.flags);
158 }
159
slic_mcast_set_bit(struct adapter * adapter,char * address)160 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
161 {
162 unsigned char crcpoly;
163
164 /* Get the CRC polynomial for the mac address */
165 /* we use bits 1-8 (lsb), bitwise reversed,
166 * msb (= lsb bit 0 before bitrev) is automatically discarded */
167 crcpoly = ether_crc(ETH_ALEN, address)>>23;
168
169 /* We only have space on the SLIC for 64 entries. Lop
170 * off the top two bits. (2^6 = 64)
171 */
172 crcpoly &= 0x3F;
173
174 /* OR in the new bit into our 64 bit mask. */
175 adapter->mcastmask |= (u64) 1 << crcpoly;
176 }
177
slic_mcast_set_mask(struct adapter * adapter)178 static void slic_mcast_set_mask(struct adapter *adapter)
179 {
180 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
181
182 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
183 /* Turn on all multicast addresses. We have to do this for
184 * promiscuous mode as well as ALLMCAST mode. It saves the
185 * Microcode from having to keep state about the MAC
186 * configuration.
187 */
188 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
189 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
190 FLUSH);
191 } else {
192 /* Commit our multicast mast to the SLIC by writing to the
193 * multicast address mask registers
194 */
195 slic_reg32_write(&slic_regs->slic_mcastlow,
196 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
197 slic_reg32_write(&slic_regs->slic_mcasthigh,
198 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
199 }
200 }
201
slic_timer_ping(ulong dev)202 static void slic_timer_ping(ulong dev)
203 {
204 struct adapter *adapter;
205 struct sliccard *card;
206
207 adapter = netdev_priv((struct net_device *)dev);
208 card = adapter->card;
209
210 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
211 add_timer(&adapter->pingtimer);
212 }
213
slic_unmap_mmio_space(struct adapter * adapter)214 static void slic_unmap_mmio_space(struct adapter *adapter)
215 {
216 if (adapter->slic_regs)
217 iounmap(adapter->slic_regs);
218 adapter->slic_regs = NULL;
219 }
220
221 /*
222 * slic_link_config
223 *
224 * Write phy control to configure link duplex/speed
225 *
226 */
slic_link_config(struct adapter * adapter,u32 linkspeed,u32 linkduplex)227 static void slic_link_config(struct adapter *adapter,
228 u32 linkspeed, u32 linkduplex)
229 {
230 u32 __iomem *wphy;
231 u32 speed;
232 u32 duplex;
233 u32 phy_config;
234 u32 phy_advreg;
235 u32 phy_gctlreg;
236
237 if (adapter->state != ADAPT_UP)
238 return;
239
240 if (linkspeed > LINK_1000MB)
241 linkspeed = LINK_AUTOSPEED;
242 if (linkduplex > LINK_AUTOD)
243 linkduplex = LINK_AUTOD;
244
245 wphy = &adapter->slic_regs->slic_wphy;
246
247 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
248 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
249 /* We've got a fiber gigabit interface, and register
250 * 4 is different in fiber mode than in copper mode
251 */
252
253 /* advertise FD only @1000 Mb */
254 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
255 /* enable PAUSE frames */
256 phy_advreg |= PAR_ASYMPAUSE_FIBER;
257 slic_reg32_write(wphy, phy_advreg, FLUSH);
258
259 if (linkspeed == LINK_AUTOSPEED) {
260 /* reset phy, enable auto-neg */
261 phy_config =
262 (MIICR_REG_PCR |
263 (PCR_RESET | PCR_AUTONEG |
264 PCR_AUTONEG_RST));
265 slic_reg32_write(wphy, phy_config, FLUSH);
266 } else { /* forced 1000 Mb FD*/
267 /* power down phy to break link
268 this may not work) */
269 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
270 slic_reg32_write(wphy, phy_config, FLUSH);
271 /* wait, Marvell says 1 sec,
272 try to get away with 10 ms */
273 mdelay(10);
274
275 /* disable auto-neg, set speed/duplex,
276 soft reset phy, powerup */
277 phy_config =
278 (MIICR_REG_PCR |
279 (PCR_RESET | PCR_SPEED_1000 |
280 PCR_DUPLEX_FULL));
281 slic_reg32_write(wphy, phy_config, FLUSH);
282 }
283 } else { /* copper gigabit */
284
285 /* Auto-Negotiate or 1000 Mb must be auto negotiated
286 * We've got a copper gigabit interface, and
287 * register 4 is different in copper mode than
288 * in fiber mode
289 */
290 if (linkspeed == LINK_AUTOSPEED) {
291 /* advertise 10/100 Mb modes */
292 phy_advreg =
293 (MIICR_REG_4 |
294 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
295 | PAR_ADV10HD));
296 } else {
297 /* linkspeed == LINK_1000MB -
298 don't advertise 10/100 Mb modes */
299 phy_advreg = MIICR_REG_4;
300 }
301 /* enable PAUSE frames */
302 phy_advreg |= PAR_ASYMPAUSE;
303 /* required by the Cicada PHY */
304 phy_advreg |= PAR_802_3;
305 slic_reg32_write(wphy, phy_advreg, FLUSH);
306 /* advertise FD only @1000 Mb */
307 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
308 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
309
310 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
311 /* if a Marvell PHY
312 enable auto crossover */
313 phy_config =
314 (MIICR_REG_16 | (MRV_REG16_XOVERON));
315 slic_reg32_write(wphy, phy_config, FLUSH);
316
317 /* reset phy, enable auto-neg */
318 phy_config =
319 (MIICR_REG_PCR |
320 (PCR_RESET | PCR_AUTONEG |
321 PCR_AUTONEG_RST));
322 slic_reg32_write(wphy, phy_config, FLUSH);
323 } else { /* it's a Cicada PHY */
324 /* enable and restart auto-neg (don't reset) */
325 phy_config =
326 (MIICR_REG_PCR |
327 (PCR_AUTONEG | PCR_AUTONEG_RST));
328 slic_reg32_write(wphy, phy_config, FLUSH);
329 }
330 }
331 } else {
332 /* Forced 10/100 */
333 if (linkspeed == LINK_10MB)
334 speed = 0;
335 else
336 speed = PCR_SPEED_100;
337 if (linkduplex == LINK_HALFD)
338 duplex = 0;
339 else
340 duplex = PCR_DUPLEX_FULL;
341
342 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
343 /* if a Marvell PHY
344 disable auto crossover */
345 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
346 slic_reg32_write(wphy, phy_config, FLUSH);
347 }
348
349 /* power down phy to break link (this may not work) */
350 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
351 slic_reg32_write(wphy, phy_config, FLUSH);
352
353 /* wait, Marvell says 1 sec, try to get away with 10 ms */
354 mdelay(10);
355
356 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
357 /* if a Marvell PHY
358 disable auto-neg, set speed,
359 soft reset phy, powerup */
360 phy_config =
361 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
362 slic_reg32_write(wphy, phy_config, FLUSH);
363 } else { /* it's a Cicada PHY */
364 /* disable auto-neg, set speed, powerup */
365 phy_config = (MIICR_REG_PCR | (speed | duplex));
366 slic_reg32_write(wphy, phy_config, FLUSH);
367 }
368 }
369 }
370
slic_card_download_gbrcv(struct adapter * adapter)371 static int slic_card_download_gbrcv(struct adapter *adapter)
372 {
373 const struct firmware *fw;
374 const char *file = "";
375 int ret;
376 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
377 u32 codeaddr;
378 u32 instruction;
379 int index = 0;
380 u32 rcvucodelen = 0;
381
382 switch (adapter->devid) {
383 case SLIC_2GB_DEVICE_ID:
384 file = "slicoss/oasisrcvucode.sys";
385 break;
386 case SLIC_1GB_DEVICE_ID:
387 file = "slicoss/gbrcvucode.sys";
388 break;
389 default:
390 return -ENOENT;
391 }
392
393 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
394 if (ret) {
395 dev_err(&adapter->pcidev->dev,
396 "Failed to load firmware %s\n", file);
397 return ret;
398 }
399
400 rcvucodelen = *(u32 *)(fw->data + index);
401 index += 4;
402 switch (adapter->devid) {
403 case SLIC_2GB_DEVICE_ID:
404 if (rcvucodelen != OasisRcvUCodeLen) {
405 release_firmware(fw);
406 return -EINVAL;
407 }
408 break;
409 case SLIC_1GB_DEVICE_ID:
410 if (rcvucodelen != GBRcvUCodeLen) {
411 release_firmware(fw);
412 return -EINVAL;
413 }
414 break;
415 }
416 /* start download */
417 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
418 /* download the rcv sequencer ucode */
419 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
420 /* write out instruction address */
421 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
422
423 instruction = *(u32 *)(fw->data + index);
424 index += 4;
425 /* write out the instruction data low addr */
426 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
427
428 instruction = *(u8 *)(fw->data + index);
429 index++;
430 /* write out the instruction data high addr */
431 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
432 FLUSH);
433 }
434
435 /* download finished */
436 release_firmware(fw);
437 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
438 return 0;
439 }
440
441 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
442 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
443
slic_card_download(struct adapter * adapter)444 static int slic_card_download(struct adapter *adapter)
445 {
446 const struct firmware *fw;
447 const char *file = "";
448 int ret;
449 u32 section;
450 int thissectionsize;
451 int codeaddr;
452 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
453 u32 instruction;
454 u32 baseaddress;
455 u32 i;
456 u32 numsects = 0;
457 u32 sectsize[3];
458 u32 sectstart[3];
459 int ucode_start, index = 0;
460
461 switch (adapter->devid) {
462 case SLIC_2GB_DEVICE_ID:
463 file = "slicoss/oasisdownload.sys";
464 break;
465 case SLIC_1GB_DEVICE_ID:
466 file = "slicoss/gbdownload.sys";
467 break;
468 default:
469 return -ENOENT;
470 }
471 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
472 if (ret) {
473 dev_err(&adapter->pcidev->dev,
474 "Failed to load firmware %s\n", file);
475 return ret;
476 }
477 numsects = *(u32 *)(fw->data + index);
478 index += 4;
479 for (i = 0; i < numsects; i++) {
480 sectsize[i] = *(u32 *)(fw->data + index);
481 index += 4;
482 }
483 for (i = 0; i < numsects; i++) {
484 sectstart[i] = *(u32 *)(fw->data + index);
485 index += 4;
486 }
487 ucode_start = index;
488 instruction = *(u32 *)(fw->data + index);
489 index += 4;
490 for (section = 0; section < numsects; section++) {
491 baseaddress = sectstart[section];
492 thissectionsize = sectsize[section] >> 3;
493
494 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
495 /* Write out instruction address */
496 slic_reg32_write(&slic_regs->slic_wcs,
497 baseaddress + codeaddr, FLUSH);
498 /* Write out instruction to low addr */
499 slic_reg32_write(&slic_regs->slic_wcs,
500 instruction, FLUSH);
501 instruction = *(u32 *)(fw->data + index);
502 index += 4;
503
504 /* Write out instruction to high addr */
505 slic_reg32_write(&slic_regs->slic_wcs,
506 instruction, FLUSH);
507 instruction = *(u32 *)(fw->data + index);
508 index += 4;
509 }
510 }
511 index = ucode_start;
512 for (section = 0; section < numsects; section++) {
513 instruction = *(u32 *)(fw->data + index);
514 baseaddress = sectstart[section];
515 if (baseaddress < 0x8000)
516 continue;
517 thissectionsize = sectsize[section] >> 3;
518
519 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
520 /* Write out instruction address */
521 slic_reg32_write(&slic_regs->slic_wcs,
522 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
523 FLUSH);
524 /* Write out instruction to low addr */
525 slic_reg32_write(&slic_regs->slic_wcs, instruction,
526 FLUSH);
527 instruction = *(u32 *)(fw->data + index);
528 index += 4;
529 /* Write out instruction to high addr */
530 slic_reg32_write(&slic_regs->slic_wcs, instruction,
531 FLUSH);
532 instruction = *(u32 *)(fw->data + index);
533 index += 4;
534
535 /* Check SRAM location zero. If it is non-zero. Abort.*/
536 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
537 if (failure) {
538 release_firmware(fw);
539 return -EIO;
540 }*/
541 }
542 }
543 release_firmware(fw);
544 /* Everything OK, kick off the card */
545 mdelay(10);
546 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
547
548 /* stall for 20 ms, long enough for ucode to init card
549 and reach mainloop */
550 mdelay(20);
551
552 return 0;
553 }
554
555 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
556 MODULE_FIRMWARE("slicoss/gbdownload.sys");
557
slic_adapter_set_hwaddr(struct adapter * adapter)558 static void slic_adapter_set_hwaddr(struct adapter *adapter)
559 {
560 struct sliccard *card = adapter->card;
561
562 if ((adapter->card) && (card->config_set)) {
563 memcpy(adapter->macaddr,
564 card->config.MacInfo[adapter->functionnumber].macaddrA,
565 sizeof(struct slic_config_mac));
566 if (is_zero_ether_addr(adapter->currmacaddr))
567 memcpy(adapter->currmacaddr, adapter->macaddr,
568 ETH_ALEN);
569 if (adapter->netdev)
570 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
571 ETH_ALEN);
572 }
573 }
574
slic_intagg_set(struct adapter * adapter,u32 value)575 static void slic_intagg_set(struct adapter *adapter, u32 value)
576 {
577 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
578 adapter->card->loadlevel_current = value;
579 }
580
slic_soft_reset(struct adapter * adapter)581 static void slic_soft_reset(struct adapter *adapter)
582 {
583 if (adapter->card->state == CARD_UP) {
584 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
585 mdelay(1);
586 }
587
588 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
589 FLUSH);
590 mdelay(1);
591 }
592
slic_mac_address_config(struct adapter * adapter)593 static void slic_mac_address_config(struct adapter *adapter)
594 {
595 u32 value;
596 u32 value2;
597 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
598
599 value = ntohl(*(__be32 *) &adapter->currmacaddr[2]);
600 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
601 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
602
603 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
604 adapter->currmacaddr[1]) & 0xFFFF);
605
606 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
607 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
608
609 /* Write our multicast mask out to the card. This is done */
610 /* here in addition to the slic_mcast_addr_set routine */
611 /* because ALL_MCAST may have been enabled or disabled */
612 slic_mcast_set_mask(adapter);
613 }
614
slic_mac_config(struct adapter * adapter)615 static void slic_mac_config(struct adapter *adapter)
616 {
617 u32 value;
618 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
619
620 /* Setup GMAC gaps */
621 if (adapter->linkspeed == LINK_1000MB) {
622 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
623 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
624 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
625 } else {
626 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
627 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
628 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
629 }
630
631 /* enable GMII */
632 if (adapter->linkspeed == LINK_1000MB)
633 value |= GMCR_GBIT;
634
635 /* enable fullduplex */
636 if ((adapter->linkduplex == LINK_FULLD)
637 || (adapter->macopts & MAC_LOOPBACK)) {
638 value |= GMCR_FULLD;
639 }
640
641 /* write mac config */
642 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
643
644 /* setup mac addresses */
645 slic_mac_address_config(adapter);
646 }
647
slic_config_set(struct adapter * adapter,bool linkchange)648 static void slic_config_set(struct adapter *adapter, bool linkchange)
649 {
650 u32 value;
651 u32 RcrReset;
652 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
653
654 if (linkchange) {
655 /* Setup MAC */
656 slic_mac_config(adapter);
657 RcrReset = GRCR_RESET;
658 } else {
659 slic_mac_address_config(adapter);
660 RcrReset = 0;
661 }
662
663 if (adapter->linkduplex == LINK_FULLD) {
664 /* setup xmtcfg */
665 value = (GXCR_RESET | /* Always reset */
666 GXCR_XMTEN | /* Enable transmit */
667 GXCR_PAUSEEN); /* Enable pause */
668
669 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
670
671 /* Setup rcvcfg last */
672 value = (RcrReset | /* Reset, if linkchange */
673 GRCR_CTLEN | /* Enable CTL frames */
674 GRCR_ADDRAEN | /* Address A enable */
675 GRCR_RCVBAD | /* Rcv bad frames */
676 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
677 } else {
678 /* setup xmtcfg */
679 value = (GXCR_RESET | /* Always reset */
680 GXCR_XMTEN); /* Enable transmit */
681
682 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
683
684 /* Setup rcvcfg last */
685 value = (RcrReset | /* Reset, if linkchange */
686 GRCR_ADDRAEN | /* Address A enable */
687 GRCR_RCVBAD | /* Rcv bad frames */
688 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
689 }
690
691 if (adapter->state != ADAPT_DOWN) {
692 /* Only enable receive if we are restarting or running */
693 value |= GRCR_RCVEN;
694 }
695
696 if (adapter->macopts & MAC_PROMISC)
697 value |= GRCR_RCVALL;
698
699 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
700 }
701
702 /*
703 * Turn off RCV and XMT, power down PHY
704 */
slic_config_clear(struct adapter * adapter)705 static void slic_config_clear(struct adapter *adapter)
706 {
707 u32 value;
708 u32 phy_config;
709 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
710
711 /* Setup xmtcfg */
712 value = (GXCR_RESET | /* Always reset */
713 GXCR_PAUSEEN); /* Enable pause */
714
715 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
716
717 value = (GRCR_RESET | /* Always reset */
718 GRCR_CTLEN | /* Enable CTL frames */
719 GRCR_ADDRAEN | /* Address A enable */
720 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
721
722 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
723
724 /* power down phy */
725 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
726 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
727 }
728
slic_mac_filter(struct adapter * adapter,struct ether_header * ether_frame)729 static bool slic_mac_filter(struct adapter *adapter,
730 struct ether_header *ether_frame)
731 {
732 struct net_device *netdev = adapter->netdev;
733 u32 opts = adapter->macopts;
734
735 if (opts & MAC_PROMISC)
736 return true;
737
738 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
739 if (opts & MAC_BCAST) {
740 adapter->rcv_broadcasts++;
741 return true;
742 }
743
744 return false;
745 }
746
747 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
748 if (opts & MAC_ALLMCAST) {
749 adapter->rcv_multicasts++;
750 netdev->stats.multicast++;
751 return true;
752 }
753 if (opts & MAC_MCAST) {
754 struct mcast_address *mcaddr = adapter->mcastaddrs;
755
756 while (mcaddr) {
757 if (ether_addr_equal(mcaddr->address,
758 ether_frame->ether_dhost)) {
759 adapter->rcv_multicasts++;
760 netdev->stats.multicast++;
761 return true;
762 }
763 mcaddr = mcaddr->next;
764 }
765
766 return false;
767 }
768
769 return false;
770 }
771 if (opts & MAC_DIRECTED) {
772 adapter->rcv_unicasts++;
773 return true;
774 }
775 return false;
776
777 }
778
slic_mac_set_address(struct net_device * dev,void * ptr)779 static int slic_mac_set_address(struct net_device *dev, void *ptr)
780 {
781 struct adapter *adapter = netdev_priv(dev);
782 struct sockaddr *addr = ptr;
783
784 if (netif_running(dev))
785 return -EBUSY;
786 if (!adapter)
787 return -EBUSY;
788
789 if (!is_valid_ether_addr(addr->sa_data))
790 return -EINVAL;
791
792 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
793 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
794
795 slic_config_set(adapter, true);
796 return 0;
797 }
798
slic_timer_load_check(ulong cardaddr)799 static void slic_timer_load_check(ulong cardaddr)
800 {
801 struct sliccard *card = (struct sliccard *)cardaddr;
802 struct adapter *adapter = card->master;
803 u32 __iomem *intagg;
804 u32 load = card->events;
805 u32 level = 0;
806
807 if ((adapter) && (adapter->state == ADAPT_UP) &&
808 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
809 intagg = &adapter->slic_regs->slic_intagg;
810 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
811 if (adapter->linkspeed == LINK_1000MB)
812 level = 100;
813 else {
814 if (load > SLIC_LOAD_5)
815 level = SLIC_INTAGG_5;
816 else if (load > SLIC_LOAD_4)
817 level = SLIC_INTAGG_4;
818 else if (load > SLIC_LOAD_3)
819 level = SLIC_INTAGG_3;
820 else if (load > SLIC_LOAD_2)
821 level = SLIC_INTAGG_2;
822 else if (load > SLIC_LOAD_1)
823 level = SLIC_INTAGG_1;
824 else
825 level = SLIC_INTAGG_0;
826 }
827 if (card->loadlevel_current != level) {
828 card->loadlevel_current = level;
829 slic_reg32_write(intagg, level, FLUSH);
830 }
831 } else {
832 if (load > SLIC_LOAD_5)
833 level = SLIC_INTAGG_5;
834 else if (load > SLIC_LOAD_4)
835 level = SLIC_INTAGG_4;
836 else if (load > SLIC_LOAD_3)
837 level = SLIC_INTAGG_3;
838 else if (load > SLIC_LOAD_2)
839 level = SLIC_INTAGG_2;
840 else if (load > SLIC_LOAD_1)
841 level = SLIC_INTAGG_1;
842 else
843 level = SLIC_INTAGG_0;
844 if (card->loadlevel_current != level) {
845 card->loadlevel_current = level;
846 slic_reg32_write(intagg, level, FLUSH);
847 }
848 }
849 }
850 card->events = 0;
851 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
852 add_timer(&card->loadtimer);
853 }
854
slic_upr_queue_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)855 static int slic_upr_queue_request(struct adapter *adapter,
856 u32 upr_request,
857 u32 upr_data,
858 u32 upr_data_h,
859 u32 upr_buffer, u32 upr_buffer_h)
860 {
861 struct slic_upr *upr;
862 struct slic_upr *uprqueue;
863
864 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
865 if (!upr)
866 return -ENOMEM;
867
868 upr->adapter = adapter->port;
869 upr->upr_request = upr_request;
870 upr->upr_data = upr_data;
871 upr->upr_buffer = upr_buffer;
872 upr->upr_data_h = upr_data_h;
873 upr->upr_buffer_h = upr_buffer_h;
874 upr->next = NULL;
875 if (adapter->upr_list) {
876 uprqueue = adapter->upr_list;
877
878 while (uprqueue->next)
879 uprqueue = uprqueue->next;
880 uprqueue->next = upr;
881 } else {
882 adapter->upr_list = upr;
883 }
884 return 0;
885 }
886
slic_upr_start(struct adapter * adapter)887 static void slic_upr_start(struct adapter *adapter)
888 {
889 struct slic_upr *upr;
890 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
891 /*
892 char * ptr1;
893 char * ptr2;
894 uint cmdoffset;
895 */
896 upr = adapter->upr_list;
897 if (!upr)
898 return;
899 if (adapter->upr_busy)
900 return;
901 adapter->upr_busy = 1;
902
903 switch (upr->upr_request) {
904 case SLIC_UPR_STATS:
905 if (upr->upr_data_h == 0) {
906 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
907 FLUSH);
908 } else {
909 slic_reg64_write(adapter, &slic_regs->slic_stats64,
910 upr->upr_data,
911 &slic_regs->slic_addr_upper,
912 upr->upr_data_h, FLUSH);
913 }
914 break;
915
916 case SLIC_UPR_RLSR:
917 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
918 &slic_regs->slic_addr_upper, upr->upr_data_h,
919 FLUSH);
920 break;
921
922 case SLIC_UPR_RCONFIG:
923 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
924 upr->upr_data, &slic_regs->slic_addr_upper,
925 upr->upr_data_h, FLUSH);
926 break;
927 case SLIC_UPR_PING:
928 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
929 break;
930 }
931 }
932
slic_upr_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)933 static int slic_upr_request(struct adapter *adapter,
934 u32 upr_request,
935 u32 upr_data,
936 u32 upr_data_h,
937 u32 upr_buffer, u32 upr_buffer_h)
938 {
939 int rc;
940
941 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
942 rc = slic_upr_queue_request(adapter,
943 upr_request,
944 upr_data,
945 upr_data_h, upr_buffer, upr_buffer_h);
946 if (rc)
947 goto err_unlock_irq;
948
949 slic_upr_start(adapter);
950 err_unlock_irq:
951 spin_unlock_irqrestore(&adapter->upr_lock.lock,
952 adapter->upr_lock.flags);
953 return rc;
954 }
955
slic_link_upr_complete(struct adapter * adapter,u32 isr)956 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
957 {
958 u32 linkstatus = adapter->pshmem->linkstatus;
959 uint linkup;
960 unsigned char linkspeed;
961 unsigned char linkduplex;
962
963 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
964 struct slic_shmem *pshmem;
965
966 pshmem = (struct slic_shmem *)(unsigned long)
967 adapter->phys_shmem;
968 #if BITS_PER_LONG == 64
969 slic_upr_queue_request(adapter,
970 SLIC_UPR_RLSR,
971 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
972 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
973 0, 0);
974 #else
975 slic_upr_queue_request(adapter,
976 SLIC_UPR_RLSR,
977 (u32) &pshmem->linkstatus,
978 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
979 #endif
980 return;
981 }
982 if (adapter->state != ADAPT_UP)
983 return;
984
985 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
986 if (linkstatus & GIG_SPEED_1000)
987 linkspeed = LINK_1000MB;
988 else if (linkstatus & GIG_SPEED_100)
989 linkspeed = LINK_100MB;
990 else
991 linkspeed = LINK_10MB;
992
993 if (linkstatus & GIG_FULLDUPLEX)
994 linkduplex = LINK_FULLD;
995 else
996 linkduplex = LINK_HALFD;
997
998 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
999 return;
1000
1001 /* link up event, but nothing has changed */
1002 if ((adapter->linkstate == LINK_UP) &&
1003 (linkup == LINK_UP) &&
1004 (adapter->linkspeed == linkspeed) &&
1005 (adapter->linkduplex == linkduplex))
1006 return;
1007
1008 /* link has changed at this point */
1009
1010 /* link has gone from up to down */
1011 if (linkup == LINK_DOWN) {
1012 adapter->linkstate = LINK_DOWN;
1013 return;
1014 }
1015
1016 /* link has gone from down to up */
1017 adapter->linkspeed = linkspeed;
1018 adapter->linkduplex = linkduplex;
1019
1020 if (adapter->linkstate != LINK_UP) {
1021 /* setup the mac */
1022 slic_config_set(adapter, true);
1023 adapter->linkstate = LINK_UP;
1024 netif_start_queue(adapter->netdev);
1025 }
1026 }
1027
slic_upr_request_complete(struct adapter * adapter,u32 isr)1028 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1029 {
1030 struct sliccard *card = adapter->card;
1031 struct slic_upr *upr;
1032
1033 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1034 upr = adapter->upr_list;
1035 if (!upr) {
1036 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1037 adapter->upr_lock.flags);
1038 return;
1039 }
1040 adapter->upr_list = upr->next;
1041 upr->next = NULL;
1042 adapter->upr_busy = 0;
1043 switch (upr->upr_request) {
1044 case SLIC_UPR_STATS:
1045 {
1046 struct slic_stats *slicstats =
1047 (struct slic_stats *) &adapter->pshmem->inicstats;
1048 struct slic_stats *newstats = slicstats;
1049 struct slic_stats *old = &adapter->inicstats_prev;
1050 struct slicnet_stats *stst = &adapter->slic_stats;
1051
1052 if (isr & ISR_UPCERR) {
1053 dev_err(&adapter->netdev->dev,
1054 "SLIC_UPR_STATS command failed isr[%x]\n",
1055 isr);
1056
1057 break;
1058 }
1059 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1060 newstats->xmit_tcp_segs_gb,
1061 old->xmit_tcp_segs_gb);
1062
1063 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1064 newstats->xmit_tcp_bytes_gb,
1065 old->xmit_tcp_bytes_gb);
1066
1067 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1068 newstats->rcv_tcp_segs_gb,
1069 old->rcv_tcp_segs_gb);
1070
1071 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1072 newstats->rcv_tcp_bytes_gb,
1073 old->rcv_tcp_bytes_gb);
1074
1075 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1076 newstats->xmit_bytes_gb,
1077 old->xmit_bytes_gb);
1078
1079 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1080 newstats->xmit_unicasts_gb,
1081 old->xmit_unicasts_gb);
1082
1083 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1084 newstats->rcv_bytes_gb,
1085 old->rcv_bytes_gb);
1086
1087 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1088 newstats->rcv_unicasts_gb,
1089 old->rcv_unicasts_gb);
1090
1091 UPDATE_STATS_GB(stst->iface.xmt_errors,
1092 newstats->xmit_collisions_gb,
1093 old->xmit_collisions_gb);
1094
1095 UPDATE_STATS_GB(stst->iface.xmt_errors,
1096 newstats->xmit_excess_collisions_gb,
1097 old->xmit_excess_collisions_gb);
1098
1099 UPDATE_STATS_GB(stst->iface.xmt_errors,
1100 newstats->xmit_other_error_gb,
1101 old->xmit_other_error_gb);
1102
1103 UPDATE_STATS_GB(stst->iface.rcv_errors,
1104 newstats->rcv_other_error_gb,
1105 old->rcv_other_error_gb);
1106
1107 UPDATE_STATS_GB(stst->iface.rcv_discards,
1108 newstats->rcv_drops_gb,
1109 old->rcv_drops_gb);
1110
1111 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1112 adapter->rcv_drops +=
1113 (newstats->rcv_drops_gb -
1114 old->rcv_drops_gb);
1115 }
1116 memcpy(old, newstats, sizeof(struct slic_stats));
1117 break;
1118 }
1119 case SLIC_UPR_RLSR:
1120 slic_link_upr_complete(adapter, isr);
1121 break;
1122 case SLIC_UPR_RCONFIG:
1123 break;
1124 case SLIC_UPR_PING:
1125 card->pingstatus |= (isr & ISR_PINGDSMASK);
1126 break;
1127 }
1128 kfree(upr);
1129 slic_upr_start(adapter);
1130 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1131 adapter->upr_lock.flags);
1132 }
1133
slic_config_get(struct adapter * adapter,u32 config,u32 config_h)1134 static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1135 {
1136 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1137 0, 0);
1138 }
1139
1140 /*
1141 * Compute a checksum of the EEPROM according to RFC 1071.
1142 */
slic_eeprom_cksum(void * eeprom,unsigned len)1143 static u16 slic_eeprom_cksum(void *eeprom, unsigned len)
1144 {
1145 u16 *wp = eeprom;
1146 u32 checksum = 0;
1147
1148 while (len > 1) {
1149 checksum += *(wp++);
1150 len -= 2;
1151 }
1152
1153 if (len > 0)
1154 checksum += *(u8 *) wp;
1155
1156
1157 while (checksum >> 16)
1158 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1159
1160 return ~checksum;
1161 }
1162
slic_rspqueue_free(struct adapter * adapter)1163 static void slic_rspqueue_free(struct adapter *adapter)
1164 {
1165 int i;
1166 struct slic_rspqueue *rspq = &adapter->rspqueue;
1167
1168 for (i = 0; i < rspq->num_pages; i++) {
1169 if (rspq->vaddr[i]) {
1170 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1171 rspq->vaddr[i], rspq->paddr[i]);
1172 }
1173 rspq->vaddr[i] = NULL;
1174 rspq->paddr[i] = 0;
1175 }
1176 rspq->offset = 0;
1177 rspq->pageindex = 0;
1178 rspq->rspbuf = NULL;
1179 }
1180
slic_rspqueue_init(struct adapter * adapter)1181 static int slic_rspqueue_init(struct adapter *adapter)
1182 {
1183 int i;
1184 struct slic_rspqueue *rspq = &adapter->rspqueue;
1185 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1186 u32 paddrh = 0;
1187
1188 memset(rspq, 0, sizeof(struct slic_rspqueue));
1189
1190 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1191
1192 for (i = 0; i < rspq->num_pages; i++) {
1193 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1194 PAGE_SIZE,
1195 &rspq->paddr[i]);
1196 if (!rspq->vaddr[i]) {
1197 dev_err(&adapter->pcidev->dev,
1198 "pci_alloc_consistent failed\n");
1199 slic_rspqueue_free(adapter);
1200 return -ENOMEM;
1201 }
1202
1203 if (paddrh == 0) {
1204 slic_reg32_write(&slic_regs->slic_rbar,
1205 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1206 DONT_FLUSH);
1207 } else {
1208 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1209 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1210 &slic_regs->slic_addr_upper,
1211 paddrh, DONT_FLUSH);
1212 }
1213 }
1214 rspq->offset = 0;
1215 rspq->pageindex = 0;
1216 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1217 return 0;
1218 }
1219
slic_rspqueue_getnext(struct adapter * adapter)1220 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1221 {
1222 struct slic_rspqueue *rspq = &adapter->rspqueue;
1223 struct slic_rspbuf *buf;
1224
1225 if (!(rspq->rspbuf->status))
1226 return NULL;
1227
1228 buf = rspq->rspbuf;
1229 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1230 rspq->rspbuf++;
1231 } else {
1232 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1233 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1234 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1235 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1236 rspq->offset = 0;
1237 rspq->rspbuf = (struct slic_rspbuf *)
1238 rspq->vaddr[rspq->pageindex];
1239 }
1240
1241 return buf;
1242 }
1243
slic_cmdqmem_free(struct adapter * adapter)1244 static void slic_cmdqmem_free(struct adapter *adapter)
1245 {
1246 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1247 int i;
1248
1249 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1250 if (cmdqmem->pages[i]) {
1251 pci_free_consistent(adapter->pcidev,
1252 PAGE_SIZE,
1253 (void *) cmdqmem->pages[i],
1254 cmdqmem->dma_pages[i]);
1255 }
1256 }
1257 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1258 }
1259
slic_cmdqmem_addpage(struct adapter * adapter)1260 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1261 {
1262 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1263 u32 *pageaddr;
1264
1265 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1266 return NULL;
1267 pageaddr = pci_alloc_consistent(adapter->pcidev,
1268 PAGE_SIZE,
1269 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1270 if (!pageaddr)
1271 return NULL;
1272
1273 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1274 cmdqmem->pagecnt++;
1275 return pageaddr;
1276 }
1277
slic_cmdq_free(struct adapter * adapter)1278 static void slic_cmdq_free(struct adapter *adapter)
1279 {
1280 struct slic_hostcmd *cmd;
1281
1282 cmd = adapter->cmdq_all.head;
1283 while (cmd) {
1284 if (cmd->busy) {
1285 struct sk_buff *tempskb;
1286
1287 tempskb = cmd->skb;
1288 if (tempskb) {
1289 cmd->skb = NULL;
1290 dev_kfree_skb_irq(tempskb);
1291 }
1292 }
1293 cmd = cmd->next_all;
1294 }
1295 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1296 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1297 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1298 slic_cmdqmem_free(adapter);
1299 }
1300
slic_cmdq_addcmdpage(struct adapter * adapter,u32 * page)1301 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1302 {
1303 struct slic_hostcmd *cmd;
1304 struct slic_hostcmd *prev;
1305 struct slic_hostcmd *tail;
1306 struct slic_cmdqueue *cmdq;
1307 int cmdcnt;
1308 void *cmdaddr;
1309 ulong phys_addr;
1310 u32 phys_addrl;
1311 u32 phys_addrh;
1312 struct slic_handle *pslic_handle;
1313
1314 cmdaddr = page;
1315 cmd = (struct slic_hostcmd *)cmdaddr;
1316 cmdcnt = 0;
1317
1318 phys_addr = virt_to_bus((void *)page);
1319 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1320 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1321
1322 prev = NULL;
1323 tail = cmd;
1324 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1325 (adapter->slic_handle_ix < 256)) {
1326 /* Allocate and initialize a SLIC_HANDLE for this command */
1327 spin_lock_irqsave(&adapter->handle_lock.lock,
1328 adapter->handle_lock.flags);
1329 pslic_handle = adapter->pfree_slic_handles;
1330 adapter->pfree_slic_handles = pslic_handle->next;
1331 spin_unlock_irqrestore(&adapter->handle_lock.lock,
1332 adapter->handle_lock.flags);
1333 pslic_handle->type = SLIC_HANDLE_CMD;
1334 pslic_handle->address = (void *) cmd;
1335 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1336 pslic_handle->other_handle = NULL;
1337 pslic_handle->next = NULL;
1338
1339 cmd->pslic_handle = pslic_handle;
1340 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1341 cmd->busy = false;
1342 cmd->paddrl = phys_addrl;
1343 cmd->paddrh = phys_addrh;
1344 cmd->next_all = prev;
1345 cmd->next = prev;
1346 prev = cmd;
1347 phys_addrl += SLIC_HOSTCMD_SIZE;
1348 cmdaddr += SLIC_HOSTCMD_SIZE;
1349
1350 cmd = (struct slic_hostcmd *)cmdaddr;
1351 cmdcnt++;
1352 }
1353
1354 cmdq = &adapter->cmdq_all;
1355 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1356 tail->next_all = cmdq->head;
1357 cmdq->head = prev;
1358 cmdq = &adapter->cmdq_free;
1359 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1360 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1361 tail->next = cmdq->head;
1362 cmdq->head = prev;
1363 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1364 }
1365
slic_cmdq_init(struct adapter * adapter)1366 static int slic_cmdq_init(struct adapter *adapter)
1367 {
1368 int i;
1369 u32 *pageaddr;
1370
1371 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1372 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1373 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1374 spin_lock_init(&adapter->cmdq_all.lock.lock);
1375 spin_lock_init(&adapter->cmdq_free.lock.lock);
1376 spin_lock_init(&adapter->cmdq_done.lock.lock);
1377 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1378 adapter->slic_handle_ix = 1;
1379 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1380 pageaddr = slic_cmdqmem_addpage(adapter);
1381 if (!pageaddr) {
1382 slic_cmdq_free(adapter);
1383 return -ENOMEM;
1384 }
1385 slic_cmdq_addcmdpage(adapter, pageaddr);
1386 }
1387 adapter->slic_handle_ix = 1;
1388
1389 return 0;
1390 }
1391
slic_cmdq_reset(struct adapter * adapter)1392 static void slic_cmdq_reset(struct adapter *adapter)
1393 {
1394 struct slic_hostcmd *hcmd;
1395 struct sk_buff *skb;
1396 u32 outstanding;
1397
1398 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1399 adapter->cmdq_free.lock.flags);
1400 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1401 adapter->cmdq_done.lock.flags);
1402 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1403 outstanding -= adapter->cmdq_free.count;
1404 hcmd = adapter->cmdq_all.head;
1405 while (hcmd) {
1406 if (hcmd->busy) {
1407 skb = hcmd->skb;
1408 hcmd->busy = 0;
1409 hcmd->skb = NULL;
1410 dev_kfree_skb_irq(skb);
1411 }
1412 hcmd = hcmd->next_all;
1413 }
1414 adapter->cmdq_free.count = 0;
1415 adapter->cmdq_free.head = NULL;
1416 adapter->cmdq_free.tail = NULL;
1417 adapter->cmdq_done.count = 0;
1418 adapter->cmdq_done.head = NULL;
1419 adapter->cmdq_done.tail = NULL;
1420 adapter->cmdq_free.head = adapter->cmdq_all.head;
1421 hcmd = adapter->cmdq_all.head;
1422 while (hcmd) {
1423 adapter->cmdq_free.count++;
1424 hcmd->next = hcmd->next_all;
1425 hcmd = hcmd->next_all;
1426 }
1427 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1428 dev_err(&adapter->netdev->dev,
1429 "free_count %d != all count %d\n",
1430 adapter->cmdq_free.count, adapter->cmdq_all.count);
1431 }
1432 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1433 adapter->cmdq_done.lock.flags);
1434 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1435 adapter->cmdq_free.lock.flags);
1436 }
1437
slic_cmdq_getdone(struct adapter * adapter)1438 static void slic_cmdq_getdone(struct adapter *adapter)
1439 {
1440 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1441 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1442
1443 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1444
1445 free_cmdq->head = done_cmdq->head;
1446 free_cmdq->count = done_cmdq->count;
1447 done_cmdq->head = NULL;
1448 done_cmdq->tail = NULL;
1449 done_cmdq->count = 0;
1450 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1451 }
1452
slic_cmdq_getfree(struct adapter * adapter)1453 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1454 {
1455 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1456 struct slic_hostcmd *cmd = NULL;
1457
1458 lock_and_retry:
1459 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1460 retry:
1461 cmd = cmdq->head;
1462 if (cmd) {
1463 cmdq->head = cmd->next;
1464 cmdq->count--;
1465 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1466 } else {
1467 slic_cmdq_getdone(adapter);
1468 cmd = cmdq->head;
1469 if (cmd) {
1470 goto retry;
1471 } else {
1472 u32 *pageaddr;
1473
1474 spin_unlock_irqrestore(&cmdq->lock.lock,
1475 cmdq->lock.flags);
1476 pageaddr = slic_cmdqmem_addpage(adapter);
1477 if (pageaddr) {
1478 slic_cmdq_addcmdpage(adapter, pageaddr);
1479 goto lock_and_retry;
1480 }
1481 }
1482 }
1483 return cmd;
1484 }
1485
slic_cmdq_putdone_irq(struct adapter * adapter,struct slic_hostcmd * cmd)1486 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1487 struct slic_hostcmd *cmd)
1488 {
1489 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1490
1491 spin_lock(&cmdq->lock.lock);
1492 cmd->busy = 0;
1493 cmd->next = cmdq->head;
1494 cmdq->head = cmd;
1495 cmdq->count++;
1496 if ((adapter->xmitq_full) && (cmdq->count > 10))
1497 netif_wake_queue(adapter->netdev);
1498 spin_unlock(&cmdq->lock.lock);
1499 }
1500
slic_rcvqueue_fill(struct adapter * adapter)1501 static int slic_rcvqueue_fill(struct adapter *adapter)
1502 {
1503 void *paddr;
1504 u32 paddrl;
1505 u32 paddrh;
1506 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1507 int i = 0;
1508 struct device *dev = &adapter->netdev->dev;
1509
1510 while (i < SLIC_RCVQ_FILLENTRIES) {
1511 struct slic_rcvbuf *rcvbuf;
1512 struct sk_buff *skb;
1513 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1514 retry_rcvqfill:
1515 #endif
1516 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1517 if (skb) {
1518 paddr = (void *)(unsigned long)
1519 pci_map_single(adapter->pcidev,
1520 skb->data,
1521 SLIC_RCVQ_RCVBUFSIZE,
1522 PCI_DMA_FROMDEVICE);
1523 paddrl = SLIC_GET_ADDR_LOW(paddr);
1524 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1525
1526 skb->len = SLIC_RCVBUF_HEADSIZE;
1527 rcvbuf = (struct slic_rcvbuf *)skb->head;
1528 rcvbuf->status = 0;
1529 skb->next = NULL;
1530 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1531 if (paddrl == 0) {
1532 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1533 __func__);
1534 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1535 dev_err(dev, " skbdata[%p]\n",
1536 skb->data);
1537 dev_err(dev, " skblen[%x]\n", skb->len);
1538 dev_err(dev, " paddr[%p]\n", paddr);
1539 dev_err(dev, " paddrl[%x]\n", paddrl);
1540 dev_err(dev, " paddrh[%x]\n", paddrh);
1541 dev_err(dev, " rcvq->head[%p]\n",
1542 rcvq->head);
1543 dev_err(dev, " rcvq->tail[%p]\n",
1544 rcvq->tail);
1545 dev_err(dev, " rcvq->count[%x]\n",
1546 rcvq->count);
1547 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1548 goto retry_rcvqfill;
1549 }
1550 #else
1551 if (paddrl == 0) {
1552 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1553 __func__);
1554 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1555 dev_err(dev, " skbdata[%p]\n",
1556 skb->data);
1557 dev_err(dev, " skblen[%x]\n", skb->len);
1558 dev_err(dev, " paddr[%p]\n", paddr);
1559 dev_err(dev, " paddrl[%x]\n", paddrl);
1560 dev_err(dev, " paddrh[%x]\n", paddrh);
1561 dev_err(dev, " rcvq->head[%p]\n",
1562 rcvq->head);
1563 dev_err(dev, " rcvq->tail[%p]\n",
1564 rcvq->tail);
1565 dev_err(dev, " rcvq->count[%x]\n",
1566 rcvq->count);
1567 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1568 }
1569 #endif
1570 if (paddrh == 0) {
1571 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1572 (u32)paddrl, DONT_FLUSH);
1573 } else {
1574 slic_reg64_write(adapter,
1575 &adapter->slic_regs->slic_hbar64,
1576 paddrl,
1577 &adapter->slic_regs->slic_addr_upper,
1578 paddrh, DONT_FLUSH);
1579 }
1580 if (rcvq->head)
1581 rcvq->tail->next = skb;
1582 else
1583 rcvq->head = skb;
1584 rcvq->tail = skb;
1585 rcvq->count++;
1586 i++;
1587 } else {
1588 dev_err(&adapter->netdev->dev,
1589 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1590 i);
1591 break;
1592 }
1593 }
1594 return i;
1595 }
1596
slic_rcvqueue_free(struct adapter * adapter)1597 static void slic_rcvqueue_free(struct adapter *adapter)
1598 {
1599 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1600 struct sk_buff *skb;
1601
1602 while (rcvq->head) {
1603 skb = rcvq->head;
1604 rcvq->head = rcvq->head->next;
1605 dev_kfree_skb(skb);
1606 }
1607 rcvq->tail = NULL;
1608 rcvq->head = NULL;
1609 rcvq->count = 0;
1610 }
1611
slic_rcvqueue_init(struct adapter * adapter)1612 static int slic_rcvqueue_init(struct adapter *adapter)
1613 {
1614 int i, count;
1615 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1616
1617 rcvq->tail = NULL;
1618 rcvq->head = NULL;
1619 rcvq->size = SLIC_RCVQ_ENTRIES;
1620 rcvq->errors = 0;
1621 rcvq->count = 0;
1622 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
1623 count = 0;
1624 while (i) {
1625 count += slic_rcvqueue_fill(adapter);
1626 i--;
1627 }
1628 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1629 slic_rcvqueue_free(adapter);
1630 return -ENOMEM;
1631 }
1632 return 0;
1633 }
1634
slic_rcvqueue_getnext(struct adapter * adapter)1635 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1636 {
1637 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1638 struct sk_buff *skb;
1639 struct slic_rcvbuf *rcvbuf;
1640 int count;
1641
1642 if (rcvq->count) {
1643 skb = rcvq->head;
1644 rcvbuf = (struct slic_rcvbuf *)skb->head;
1645
1646 if (rcvbuf->status & IRHDDR_SVALID) {
1647 rcvq->head = rcvq->head->next;
1648 skb->next = NULL;
1649 rcvq->count--;
1650 } else {
1651 skb = NULL;
1652 }
1653 } else {
1654 dev_err(&adapter->netdev->dev,
1655 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1656 skb = NULL;
1657 }
1658 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1659 count = slic_rcvqueue_fill(adapter);
1660 if (!count)
1661 break;
1662 }
1663 if (skb)
1664 rcvq->errors = 0;
1665 return skb;
1666 }
1667
slic_rcvqueue_reinsert(struct adapter * adapter,struct sk_buff * skb)1668 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1669 {
1670 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1671 void *paddr;
1672 u32 paddrl;
1673 u32 paddrh;
1674 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1675 struct device *dev;
1676
1677 paddr = (void *)(unsigned long)
1678 pci_map_single(adapter->pcidev, skb->head,
1679 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1680 rcvbuf->status = 0;
1681 skb->next = NULL;
1682
1683 paddrl = SLIC_GET_ADDR_LOW(paddr);
1684 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1685
1686 if (paddrl == 0) {
1687 dev = &adapter->netdev->dev;
1688 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1689 __func__);
1690 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1691 dev_err(dev, " skbdata[%p]\n", skb->data);
1692 dev_err(dev, " skblen[%x]\n", skb->len);
1693 dev_err(dev, " paddr[%p]\n", paddr);
1694 dev_err(dev, " paddrl[%x]\n", paddrl);
1695 dev_err(dev, " paddrh[%x]\n", paddrh);
1696 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1697 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1698 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1699 }
1700 if (paddrh == 0) {
1701 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1702 DONT_FLUSH);
1703 } else {
1704 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1705 paddrl, &adapter->slic_regs->slic_addr_upper,
1706 paddrh, DONT_FLUSH);
1707 }
1708 if (rcvq->head)
1709 rcvq->tail->next = skb;
1710 else
1711 rcvq->head = skb;
1712 rcvq->tail = skb;
1713 rcvq->count++;
1714 return rcvq->count;
1715 }
1716
1717 /*
1718 * slic_link_event_handler -
1719 *
1720 * Initiate a link configuration sequence. The link configuration begins
1721 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1722 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1723 * routine will follow it up witha UP configuration write command, which
1724 * will also complete asynchronously.
1725 *
1726 */
slic_link_event_handler(struct adapter * adapter)1727 static void slic_link_event_handler(struct adapter *adapter)
1728 {
1729 int status;
1730 struct slic_shmem *pshmem;
1731
1732 if (adapter->state != ADAPT_UP) {
1733 /* Adapter is not operational. Ignore. */
1734 return;
1735 }
1736
1737 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
1738
1739 #if BITS_PER_LONG == 64
1740 status = slic_upr_request(adapter,
1741 SLIC_UPR_RLSR,
1742 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1743 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1744 0, 0);
1745 #else
1746 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1747 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1748 0, 0, 0);
1749 #endif
1750 }
1751
slic_init_cleanup(struct adapter * adapter)1752 static void slic_init_cleanup(struct adapter *adapter)
1753 {
1754 if (adapter->intrregistered) {
1755 adapter->intrregistered = 0;
1756 free_irq(adapter->netdev->irq, adapter->netdev);
1757
1758 }
1759 if (adapter->pshmem) {
1760 pci_free_consistent(adapter->pcidev,
1761 sizeof(struct slic_shmem),
1762 adapter->pshmem, adapter->phys_shmem);
1763 adapter->pshmem = NULL;
1764 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
1765 }
1766
1767 if (adapter->pingtimerset) {
1768 adapter->pingtimerset = 0;
1769 del_timer(&adapter->pingtimer);
1770 }
1771
1772 slic_rspqueue_free(adapter);
1773 slic_cmdq_free(adapter);
1774 slic_rcvqueue_free(adapter);
1775 }
1776
1777 /*
1778 * Allocate a mcast_address structure to hold the multicast address.
1779 * Link it in.
1780 */
slic_mcast_add_list(struct adapter * adapter,char * address)1781 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1782 {
1783 struct mcast_address *mcaddr, *mlist;
1784
1785 /* Check to see if it already exists */
1786 mlist = adapter->mcastaddrs;
1787 while (mlist) {
1788 if (ether_addr_equal(mlist->address, address))
1789 return 0;
1790 mlist = mlist->next;
1791 }
1792
1793 /* Doesn't already exist. Allocate a structure to hold it */
1794 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1795 if (mcaddr == NULL)
1796 return 1;
1797
1798 ether_addr_copy(mcaddr->address, address);
1799
1800 mcaddr->next = adapter->mcastaddrs;
1801 adapter->mcastaddrs = mcaddr;
1802
1803 return 0;
1804 }
1805
slic_mcast_set_list(struct net_device * dev)1806 static void slic_mcast_set_list(struct net_device *dev)
1807 {
1808 struct adapter *adapter = netdev_priv(dev);
1809 int status = 0;
1810 char *addresses;
1811 struct netdev_hw_addr *ha;
1812
1813 netdev_for_each_mc_addr(ha, dev) {
1814 addresses = (char *) &ha->addr;
1815 status = slic_mcast_add_list(adapter, addresses);
1816 if (status != 0)
1817 break;
1818 slic_mcast_set_bit(adapter, addresses);
1819 }
1820
1821 if (adapter->devflags_prev != dev->flags) {
1822 adapter->macopts = MAC_DIRECTED;
1823 if (dev->flags) {
1824 if (dev->flags & IFF_BROADCAST)
1825 adapter->macopts |= MAC_BCAST;
1826 if (dev->flags & IFF_PROMISC)
1827 adapter->macopts |= MAC_PROMISC;
1828 if (dev->flags & IFF_ALLMULTI)
1829 adapter->macopts |= MAC_ALLMCAST;
1830 if (dev->flags & IFF_MULTICAST)
1831 adapter->macopts |= MAC_MCAST;
1832 }
1833 adapter->devflags_prev = dev->flags;
1834 slic_config_set(adapter, true);
1835 } else {
1836 if (status == 0)
1837 slic_mcast_set_mask(adapter);
1838 }
1839 }
1840
1841 #define XMIT_FAIL_LINK_STATE 1
1842 #define XMIT_FAIL_ZERO_LENGTH 2
1843 #define XMIT_FAIL_HOSTCMD_FAIL 3
1844
slic_xmit_build_request(struct adapter * adapter,struct slic_hostcmd * hcmd,struct sk_buff * skb)1845 static void slic_xmit_build_request(struct adapter *adapter,
1846 struct slic_hostcmd *hcmd, struct sk_buff *skb)
1847 {
1848 struct slic_host64_cmd *ihcmd;
1849 ulong phys_addr;
1850
1851 ihcmd = &hcmd->cmd64;
1852
1853 ihcmd->flags = adapter->port << IHFLG_IFSHFT;
1854 ihcmd->command = IHCMD_XMT_REQ;
1855 ihcmd->u.slic_buffers.totlen = skb->len;
1856 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1857 PCI_DMA_TODEVICE);
1858 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1859 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1860 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1861 #if BITS_PER_LONG == 64
1862 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1863 (u64) hcmd) + 31) >> 5);
1864 #else
1865 hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
1866 (u32)hcmd) + 31) >> 5;
1867 #endif
1868 }
1869
slic_xmit_fail(struct adapter * adapter,struct sk_buff * skb,void * cmd,u32 skbtype,u32 status)1870 static void slic_xmit_fail(struct adapter *adapter,
1871 struct sk_buff *skb,
1872 void *cmd, u32 skbtype, u32 status)
1873 {
1874 if (adapter->xmitq_full)
1875 netif_stop_queue(adapter->netdev);
1876 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1877 switch (status) {
1878 case XMIT_FAIL_LINK_STATE:
1879 dev_err(&adapter->netdev->dev,
1880 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1881 skb, skb->pkt_type,
1882 SLIC_LINKSTATE(adapter->linkstate),
1883 SLIC_ADAPTER_STATE(adapter->state),
1884 adapter->state,
1885 SLIC_CARD_STATE(adapter->card->state),
1886 adapter->card->state);
1887 break;
1888 case XMIT_FAIL_ZERO_LENGTH:
1889 dev_err(&adapter->netdev->dev,
1890 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1891 skb, skb->pkt_type);
1892 break;
1893 case XMIT_FAIL_HOSTCMD_FAIL:
1894 dev_err(&adapter->netdev->dev,
1895 "xmit_start skb[%p] type[%x] No host commands available\n",
1896 skb, skb->pkt_type);
1897 break;
1898 }
1899 }
1900 dev_kfree_skb(skb);
1901 adapter->netdev->stats.tx_dropped++;
1902 }
1903
slic_rcv_handle_error(struct adapter * adapter,struct slic_rcvbuf * rcvbuf)1904 static void slic_rcv_handle_error(struct adapter *adapter,
1905 struct slic_rcvbuf *rcvbuf)
1906 {
1907 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1908 struct net_device *netdev = adapter->netdev;
1909
1910 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1911 if (hdr->frame_status14 & VRHSTAT_802OE)
1912 adapter->if_events.oflow802++;
1913 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1914 adapter->if_events.Tprtoflow++;
1915 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1916 adapter->if_events.uflow802++;
1917 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1918 adapter->if_events.rcvearly++;
1919 netdev->stats.rx_fifo_errors++;
1920 }
1921 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1922 adapter->if_events.Bufov++;
1923 netdev->stats.rx_over_errors++;
1924 }
1925 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1926 adapter->if_events.Carre++;
1927 netdev->stats.tx_carrier_errors++;
1928 }
1929 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1930 adapter->if_events.Longe++;
1931 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1932 adapter->if_events.Invp++;
1933 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1934 adapter->if_events.Crc++;
1935 netdev->stats.rx_crc_errors++;
1936 }
1937 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1938 adapter->if_events.Drbl++;
1939 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1940 adapter->if_events.Code++;
1941 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1942 adapter->if_events.TpCsum++;
1943 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1944 adapter->if_events.TpHlen++;
1945 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1946 adapter->if_events.IpCsum++;
1947 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1948 adapter->if_events.IpLen++;
1949 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1950 adapter->if_events.IpHlen++;
1951 } else {
1952 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1953 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1954
1955 if (xerr == VGBSTAT_XCSERR)
1956 adapter->if_events.TpCsum++;
1957 if (xerr == VGBSTAT_XUFLOW)
1958 adapter->if_events.Tprtoflow++;
1959 if (xerr == VGBSTAT_XHLEN)
1960 adapter->if_events.TpHlen++;
1961 }
1962 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1963 u32 nerr =
1964 (hdr->
1965 frame_statusGB >> VGBSTAT_NERRSHFT) &
1966 VGBSTAT_NERRMSK;
1967 if (nerr == VGBSTAT_NCSERR)
1968 adapter->if_events.IpCsum++;
1969 if (nerr == VGBSTAT_NUFLOW)
1970 adapter->if_events.IpLen++;
1971 if (nerr == VGBSTAT_NHLEN)
1972 adapter->if_events.IpHlen++;
1973 }
1974 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1975 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1976
1977 if (lerr == VGBSTAT_LDEARLY)
1978 adapter->if_events.rcvearly++;
1979 if (lerr == VGBSTAT_LBOFLO)
1980 adapter->if_events.Bufov++;
1981 if (lerr == VGBSTAT_LCODERR)
1982 adapter->if_events.Code++;
1983 if (lerr == VGBSTAT_LDBLNBL)
1984 adapter->if_events.Drbl++;
1985 if (lerr == VGBSTAT_LCRCERR)
1986 adapter->if_events.Crc++;
1987 if (lerr == VGBSTAT_LOFLO)
1988 adapter->if_events.oflow802++;
1989 if (lerr == VGBSTAT_LUFLO)
1990 adapter->if_events.uflow802++;
1991 }
1992 }
1993 }
1994
1995 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1996 #define M_FAST_PATH 0x0040
1997
slic_rcv_handler(struct adapter * adapter)1998 static void slic_rcv_handler(struct adapter *adapter)
1999 {
2000 struct net_device *netdev = adapter->netdev;
2001 struct sk_buff *skb;
2002 struct slic_rcvbuf *rcvbuf;
2003 u32 frames = 0;
2004
2005 while ((skb = slic_rcvqueue_getnext(adapter))) {
2006 u32 rx_bytes;
2007
2008 rcvbuf = (struct slic_rcvbuf *)skb->head;
2009 adapter->card->events++;
2010 if (rcvbuf->status & IRHDDR_ERR) {
2011 adapter->rx_errors++;
2012 slic_rcv_handle_error(adapter, rcvbuf);
2013 slic_rcvqueue_reinsert(adapter, skb);
2014 continue;
2015 }
2016
2017 if (!slic_mac_filter(adapter, (struct ether_header *)
2018 rcvbuf->data)) {
2019 slic_rcvqueue_reinsert(adapter, skb);
2020 continue;
2021 }
2022 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2023 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2024 skb_put(skb, rx_bytes);
2025 netdev->stats.rx_packets++;
2026 netdev->stats.rx_bytes += rx_bytes;
2027 #if SLIC_OFFLOAD_IP_CHECKSUM
2028 skb->ip_summed = CHECKSUM_UNNECESSARY;
2029 #endif
2030
2031 skb->dev = adapter->netdev;
2032 skb->protocol = eth_type_trans(skb, skb->dev);
2033 netif_rx(skb);
2034
2035 ++frames;
2036 #if SLIC_INTERRUPT_PROCESS_LIMIT
2037 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2038 adapter->rcv_interrupt_yields++;
2039 break;
2040 }
2041 #endif
2042 }
2043 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2044 }
2045
slic_xmit_complete(struct adapter * adapter)2046 static void slic_xmit_complete(struct adapter *adapter)
2047 {
2048 struct slic_hostcmd *hcmd;
2049 struct slic_rspbuf *rspbuf;
2050 u32 frames = 0;
2051 struct slic_handle_word slic_handle_word;
2052
2053 do {
2054 rspbuf = slic_rspqueue_getnext(adapter);
2055 if (!rspbuf)
2056 break;
2057 adapter->xmit_completes++;
2058 adapter->card->events++;
2059 /*
2060 Get the complete host command buffer
2061 */
2062 slic_handle_word.handle_token = rspbuf->hosthandle;
2063 hcmd =
2064 (struct slic_hostcmd *)
2065 adapter->slic_handles[slic_handle_word.handle_index].
2066 address;
2067 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2068 if (hcmd->type == SLIC_CMD_DUMB) {
2069 if (hcmd->skb)
2070 dev_kfree_skb_irq(hcmd->skb);
2071 slic_cmdq_putdone_irq(adapter, hcmd);
2072 }
2073 rspbuf->status = 0;
2074 rspbuf->hosthandle = 0;
2075 frames++;
2076 } while (1);
2077 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2078 }
2079
slic_interrupt_card_up(u32 isr,struct adapter * adapter,struct net_device * dev)2080 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2081 struct net_device *dev)
2082 {
2083 if (isr & ~ISR_IO) {
2084 if (isr & ISR_ERR) {
2085 adapter->error_interrupts++;
2086 if (isr & ISR_RMISS) {
2087 int count;
2088 int pre_count;
2089 int errors;
2090
2091 struct slic_rcvqueue *rcvq =
2092 &adapter->rcvqueue;
2093
2094 adapter->error_rmiss_interrupts++;
2095
2096 if (!rcvq->errors)
2097 rcv_count = rcvq->count;
2098 pre_count = rcvq->count;
2099 errors = rcvq->errors;
2100
2101 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2102 count = slic_rcvqueue_fill(adapter);
2103 if (!count)
2104 break;
2105 }
2106 } else if (isr & ISR_XDROP) {
2107 dev_err(&dev->dev,
2108 "isr & ISR_ERR [%x] ISR_XDROP\n",
2109 isr);
2110 } else {
2111 dev_err(&dev->dev,
2112 "isr & ISR_ERR [%x]\n",
2113 isr);
2114 }
2115 }
2116
2117 if (isr & ISR_LEVENT) {
2118 adapter->linkevent_interrupts++;
2119 slic_link_event_handler(adapter);
2120 }
2121
2122 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2123 (isr & ISR_UPCBSY)) {
2124 adapter->upr_interrupts++;
2125 slic_upr_request_complete(adapter, isr);
2126 }
2127 }
2128
2129 if (isr & ISR_RCV) {
2130 adapter->rcv_interrupts++;
2131 slic_rcv_handler(adapter);
2132 }
2133
2134 if (isr & ISR_CMD) {
2135 adapter->xmit_interrupts++;
2136 slic_xmit_complete(adapter);
2137 }
2138 }
2139
2140
slic_interrupt(int irq,void * dev_id)2141 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2142 {
2143 struct net_device *dev = (struct net_device *)dev_id;
2144 struct adapter *adapter = netdev_priv(dev);
2145 u32 isr;
2146
2147 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2148 slic_reg32_write(&adapter->slic_regs->slic_icr,
2149 ICR_INT_MASK, FLUSH);
2150 isr = adapter->isrcopy = adapter->pshmem->isr;
2151 adapter->pshmem->isr = 0;
2152 adapter->num_isrs++;
2153 switch (adapter->card->state) {
2154 case CARD_UP:
2155 slic_interrupt_card_up(isr, adapter, dev);
2156 break;
2157
2158 case CARD_DOWN:
2159 if ((isr & ISR_UPC) ||
2160 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2161 adapter->upr_interrupts++;
2162 slic_upr_request_complete(adapter, isr);
2163 }
2164 break;
2165 }
2166
2167 adapter->isrcopy = 0;
2168 adapter->all_reg_writes += 2;
2169 adapter->isr_reg_writes++;
2170 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2171 } else {
2172 adapter->false_interrupts++;
2173 }
2174 return IRQ_HANDLED;
2175 }
2176
2177 #define NORMAL_ETHFRAME 0
2178
slic_xmit_start(struct sk_buff * skb,struct net_device * dev)2179 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2180 {
2181 struct sliccard *card;
2182 struct adapter *adapter = netdev_priv(dev);
2183 struct slic_hostcmd *hcmd = NULL;
2184 u32 status = 0;
2185 void *offloadcmd = NULL;
2186
2187 card = adapter->card;
2188 if ((adapter->linkstate != LINK_UP) ||
2189 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2190 status = XMIT_FAIL_LINK_STATE;
2191 goto xmit_fail;
2192
2193 } else if (skb->len == 0) {
2194 status = XMIT_FAIL_ZERO_LENGTH;
2195 goto xmit_fail;
2196 }
2197
2198 hcmd = slic_cmdq_getfree(adapter);
2199 if (!hcmd) {
2200 adapter->xmitq_full = 1;
2201 status = XMIT_FAIL_HOSTCMD_FAIL;
2202 goto xmit_fail;
2203 }
2204 hcmd->skb = skb;
2205 hcmd->busy = 1;
2206 hcmd->type = SLIC_CMD_DUMB;
2207 slic_xmit_build_request(adapter, hcmd, skb);
2208 dev->stats.tx_packets++;
2209 dev->stats.tx_bytes += skb->len;
2210
2211 #ifdef DEBUG_DUMP
2212 if (adapter->kill_card) {
2213 struct slic_host64_cmd ihcmd;
2214
2215 ihcmd = &hcmd->cmd64;
2216
2217 ihcmd->flags |= 0x40;
2218 adapter->kill_card = 0; /* only do this once */
2219 }
2220 #endif
2221 if (hcmd->paddrh == 0) {
2222 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2223 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2224 } else {
2225 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2226 (hcmd->paddrl | hcmd->cmdsize),
2227 &adapter->slic_regs->slic_addr_upper,
2228 hcmd->paddrh, DONT_FLUSH);
2229 }
2230 xmit_done:
2231 return NETDEV_TX_OK;
2232 xmit_fail:
2233 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2234 goto xmit_done;
2235 }
2236
2237
slic_adapter_freeresources(struct adapter * adapter)2238 static void slic_adapter_freeresources(struct adapter *adapter)
2239 {
2240 slic_init_cleanup(adapter);
2241 adapter->error_interrupts = 0;
2242 adapter->rcv_interrupts = 0;
2243 adapter->xmit_interrupts = 0;
2244 adapter->linkevent_interrupts = 0;
2245 adapter->upr_interrupts = 0;
2246 adapter->num_isrs = 0;
2247 adapter->xmit_completes = 0;
2248 adapter->rcv_broadcasts = 0;
2249 adapter->rcv_multicasts = 0;
2250 adapter->rcv_unicasts = 0;
2251 }
2252
slic_adapter_allocresources(struct adapter * adapter)2253 static int slic_adapter_allocresources(struct adapter *adapter)
2254 {
2255 if (!adapter->intrregistered) {
2256 int retval;
2257
2258 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2259 slic_global.driver_lock.flags);
2260
2261 retval = request_irq(adapter->netdev->irq,
2262 &slic_interrupt,
2263 IRQF_SHARED,
2264 adapter->netdev->name, adapter->netdev);
2265
2266 spin_lock_irqsave(&slic_global.driver_lock.lock,
2267 slic_global.driver_lock.flags);
2268
2269 if (retval) {
2270 dev_err(&adapter->netdev->dev,
2271 "request_irq (%s) FAILED [%x]\n",
2272 adapter->netdev->name, retval);
2273 return retval;
2274 }
2275 adapter->intrregistered = 1;
2276 }
2277 return 0;
2278 }
2279
2280 /*
2281 * slic_if_init
2282 *
2283 * Perform initialization of our slic interface.
2284 *
2285 */
slic_if_init(struct adapter * adapter)2286 static int slic_if_init(struct adapter *adapter)
2287 {
2288 struct sliccard *card = adapter->card;
2289 struct net_device *dev = adapter->netdev;
2290 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2291 struct slic_shmem *pshmem;
2292 int rc;
2293
2294 /* adapter should be down at this point */
2295 if (adapter->state != ADAPT_DOWN) {
2296 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2297 __func__);
2298 rc = -EIO;
2299 goto err;
2300 }
2301
2302 adapter->devflags_prev = dev->flags;
2303 adapter->macopts = MAC_DIRECTED;
2304 if (dev->flags) {
2305 if (dev->flags & IFF_BROADCAST)
2306 adapter->macopts |= MAC_BCAST;
2307 if (dev->flags & IFF_PROMISC)
2308 adapter->macopts |= MAC_PROMISC;
2309 if (dev->flags & IFF_ALLMULTI)
2310 adapter->macopts |= MAC_ALLMCAST;
2311 if (dev->flags & IFF_MULTICAST)
2312 adapter->macopts |= MAC_MCAST;
2313 }
2314 rc = slic_adapter_allocresources(adapter);
2315 if (rc) {
2316 dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
2317 rc);
2318 slic_adapter_freeresources(adapter);
2319 goto err;
2320 }
2321
2322 if (!adapter->queues_initialized) {
2323 rc = slic_rspqueue_init(adapter);
2324 if (rc)
2325 goto err;
2326 rc = slic_cmdq_init(adapter);
2327 if (rc)
2328 goto err;
2329 rc = slic_rcvqueue_init(adapter);
2330 if (rc)
2331 goto err;
2332 adapter->queues_initialized = 1;
2333 }
2334
2335 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2336 mdelay(1);
2337
2338 if (!adapter->isp_initialized) {
2339 pshmem = (struct slic_shmem *)(unsigned long)
2340 adapter->phys_shmem;
2341
2342 spin_lock_irqsave(&adapter->bit64reglock.lock,
2343 adapter->bit64reglock.flags);
2344
2345 #if BITS_PER_LONG == 64
2346 slic_reg32_write(&slic_regs->slic_addr_upper,
2347 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2348 slic_reg32_write(&slic_regs->slic_isp,
2349 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2350 #else
2351 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2352 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
2353 FLUSH);
2354 #endif
2355 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2356 adapter->bit64reglock.flags);
2357 adapter->isp_initialized = 1;
2358 }
2359
2360 adapter->state = ADAPT_UP;
2361 if (!card->loadtimerset) {
2362 setup_timer(&card->loadtimer, &slic_timer_load_check,
2363 (ulong)card);
2364 card->loadtimer.expires =
2365 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2366 add_timer(&card->loadtimer);
2367
2368 card->loadtimerset = 1;
2369 }
2370
2371 if (!adapter->pingtimerset) {
2372 setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
2373 adapter->pingtimer.expires =
2374 jiffies + (PING_TIMER_INTERVAL * HZ);
2375 add_timer(&adapter->pingtimer);
2376 adapter->pingtimerset = 1;
2377 adapter->card->pingstatus = ISR_PINGMASK;
2378 }
2379
2380 /*
2381 * clear any pending events, then enable interrupts
2382 */
2383 adapter->isrcopy = 0;
2384 adapter->pshmem->isr = 0;
2385 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2386 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2387
2388 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2389 slic_link_event_handler(adapter);
2390
2391 err:
2392 return rc;
2393 }
2394
slic_entry_open(struct net_device * dev)2395 static int slic_entry_open(struct net_device *dev)
2396 {
2397 struct adapter *adapter = netdev_priv(dev);
2398 struct sliccard *card = adapter->card;
2399 int status;
2400
2401 netif_stop_queue(adapter->netdev);
2402
2403 spin_lock_irqsave(&slic_global.driver_lock.lock,
2404 slic_global.driver_lock.flags);
2405 if (!adapter->activated) {
2406 card->adapters_activated++;
2407 slic_global.num_slic_ports_active++;
2408 adapter->activated = 1;
2409 }
2410 status = slic_if_init(adapter);
2411
2412 if (status != 0) {
2413 if (adapter->activated) {
2414 card->adapters_activated--;
2415 slic_global.num_slic_ports_active--;
2416 adapter->activated = 0;
2417 }
2418 goto spin_unlock;
2419 }
2420 if (!card->master)
2421 card->master = adapter;
2422
2423 spin_unlock:
2424 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2425 slic_global.driver_lock.flags);
2426 return status;
2427 }
2428
slic_card_cleanup(struct sliccard * card)2429 static void slic_card_cleanup(struct sliccard *card)
2430 {
2431 if (card->loadtimerset) {
2432 card->loadtimerset = 0;
2433 del_timer_sync(&card->loadtimer);
2434 }
2435
2436 kfree(card);
2437 }
2438
slic_entry_remove(struct pci_dev * pcidev)2439 static void slic_entry_remove(struct pci_dev *pcidev)
2440 {
2441 struct net_device *dev = pci_get_drvdata(pcidev);
2442 struct adapter *adapter = netdev_priv(dev);
2443 struct sliccard *card;
2444 struct mcast_address *mcaddr, *mlist;
2445
2446 unregister_netdev(dev);
2447
2448 slic_adapter_freeresources(adapter);
2449 slic_unmap_mmio_space(adapter);
2450
2451 /* free multicast addresses */
2452 mlist = adapter->mcastaddrs;
2453 while (mlist) {
2454 mcaddr = mlist;
2455 mlist = mlist->next;
2456 kfree(mcaddr);
2457 }
2458 card = adapter->card;
2459 card->adapters_allocated--;
2460 adapter->allocated = 0;
2461 if (!card->adapters_allocated) {
2462 struct sliccard *curr_card = slic_global.slic_card;
2463
2464 if (curr_card == card) {
2465 slic_global.slic_card = card->next;
2466 } else {
2467 while (curr_card->next != card)
2468 curr_card = curr_card->next;
2469 curr_card->next = card->next;
2470 }
2471 slic_global.num_slic_cards--;
2472 slic_card_cleanup(card);
2473 }
2474 free_netdev(dev);
2475 pci_release_regions(pcidev);
2476 pci_disable_device(pcidev);
2477 }
2478
slic_entry_halt(struct net_device * dev)2479 static int slic_entry_halt(struct net_device *dev)
2480 {
2481 struct adapter *adapter = netdev_priv(dev);
2482 struct sliccard *card = adapter->card;
2483 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2484
2485 spin_lock_irqsave(&slic_global.driver_lock.lock,
2486 slic_global.driver_lock.flags);
2487 netif_stop_queue(adapter->netdev);
2488 adapter->state = ADAPT_DOWN;
2489 adapter->linkstate = LINK_DOWN;
2490 adapter->upr_list = NULL;
2491 adapter->upr_busy = 0;
2492 adapter->devflags_prev = 0;
2493 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2494 adapter->all_reg_writes++;
2495 adapter->icr_reg_writes++;
2496 slic_config_clear(adapter);
2497 if (adapter->activated) {
2498 card->adapters_activated--;
2499 slic_global.num_slic_ports_active--;
2500 adapter->activated = 0;
2501 }
2502 #ifdef AUTOMATIC_RESET
2503 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2504 #endif
2505 /*
2506 * Reset the adapter's cmd queues
2507 */
2508 slic_cmdq_reset(adapter);
2509
2510 #ifdef AUTOMATIC_RESET
2511 if (!card->adapters_activated)
2512 slic_card_init(card, adapter);
2513 #endif
2514
2515 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2516 slic_global.driver_lock.flags);
2517 return 0;
2518 }
2519
slic_get_stats(struct net_device * dev)2520 static struct net_device_stats *slic_get_stats(struct net_device *dev)
2521 {
2522 struct adapter *adapter = netdev_priv(dev);
2523
2524 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2525 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2526 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2527 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2528 dev->stats.tx_heartbeat_errors = 0;
2529 dev->stats.tx_aborted_errors = 0;
2530 dev->stats.tx_window_errors = 0;
2531 dev->stats.tx_fifo_errors = 0;
2532 dev->stats.rx_frame_errors = 0;
2533 dev->stats.rx_length_errors = 0;
2534
2535 return &dev->stats;
2536 }
2537
slic_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)2538 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2539 {
2540 struct adapter *adapter = netdev_priv(dev);
2541 struct ethtool_cmd edata;
2542 struct ethtool_cmd ecmd;
2543 u32 data[7];
2544 u32 intagg;
2545
2546 switch (cmd) {
2547 case SIOCSLICSETINTAGG:
2548 if (copy_from_user(data, rq->ifr_data, 28))
2549 return -EFAULT;
2550 intagg = data[0];
2551 dev_err(&dev->dev, "set interrupt aggregation to %d\n",
2552 intagg);
2553 slic_intagg_set(adapter, intagg);
2554 return 0;
2555
2556 case SIOCETHTOOL:
2557 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2558 return -EFAULT;
2559
2560 if (ecmd.cmd == ETHTOOL_GSET) {
2561 memset(&edata, 0, sizeof(edata));
2562 edata.supported = (SUPPORTED_10baseT_Half |
2563 SUPPORTED_10baseT_Full |
2564 SUPPORTED_100baseT_Half |
2565 SUPPORTED_100baseT_Full |
2566 SUPPORTED_Autoneg | SUPPORTED_MII);
2567 edata.port = PORT_MII;
2568 edata.transceiver = XCVR_INTERNAL;
2569 edata.phy_address = 0;
2570 if (adapter->linkspeed == LINK_100MB)
2571 edata.speed = SPEED_100;
2572 else if (adapter->linkspeed == LINK_10MB)
2573 edata.speed = SPEED_10;
2574 else
2575 edata.speed = 0;
2576
2577 if (adapter->linkduplex == LINK_FULLD)
2578 edata.duplex = DUPLEX_FULL;
2579 else
2580 edata.duplex = DUPLEX_HALF;
2581
2582 edata.autoneg = AUTONEG_ENABLE;
2583 edata.maxtxpkt = 1;
2584 edata.maxrxpkt = 1;
2585 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2586 return -EFAULT;
2587
2588 } else if (ecmd.cmd == ETHTOOL_SSET) {
2589 if (!capable(CAP_NET_ADMIN))
2590 return -EPERM;
2591
2592 if (adapter->linkspeed == LINK_100MB)
2593 edata.speed = SPEED_100;
2594 else if (adapter->linkspeed == LINK_10MB)
2595 edata.speed = SPEED_10;
2596 else
2597 edata.speed = 0;
2598
2599 if (adapter->linkduplex == LINK_FULLD)
2600 edata.duplex = DUPLEX_FULL;
2601 else
2602 edata.duplex = DUPLEX_HALF;
2603
2604 edata.autoneg = AUTONEG_ENABLE;
2605 edata.maxtxpkt = 1;
2606 edata.maxrxpkt = 1;
2607 if ((ecmd.speed != edata.speed) ||
2608 (ecmd.duplex != edata.duplex)) {
2609 u32 speed;
2610 u32 duplex;
2611
2612 if (ecmd.speed == SPEED_10)
2613 speed = 0;
2614 else
2615 speed = PCR_SPEED_100;
2616 if (ecmd.duplex == DUPLEX_FULL)
2617 duplex = PCR_DUPLEX_FULL;
2618 else
2619 duplex = 0;
2620 slic_link_config(adapter, speed, duplex);
2621 slic_link_event_handler(adapter);
2622 }
2623 }
2624 return 0;
2625 default:
2626 return -EOPNOTSUPP;
2627 }
2628 }
2629
slic_config_pci(struct pci_dev * pcidev)2630 static void slic_config_pci(struct pci_dev *pcidev)
2631 {
2632 u16 pci_command;
2633 u16 new_command;
2634
2635 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2636
2637 new_command = pci_command | PCI_COMMAND_MASTER
2638 | PCI_COMMAND_MEMORY
2639 | PCI_COMMAND_INVALIDATE
2640 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2641 if (pci_command != new_command)
2642 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2643 }
2644
slic_card_init(struct sliccard * card,struct adapter * adapter)2645 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2646 {
2647 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2648 struct slic_eeprom *peeprom;
2649 struct oslic_eeprom *pOeeprom;
2650 dma_addr_t phys_config;
2651 u32 phys_configh;
2652 u32 phys_configl;
2653 u32 i = 0;
2654 struct slic_shmem *pshmem;
2655 int status;
2656 uint macaddrs = card->card_size;
2657 ushort eecodesize;
2658 ushort dramsize;
2659 ushort ee_chksum;
2660 ushort calc_chksum;
2661 struct slic_config_mac *pmac;
2662 unsigned char fruformat;
2663 unsigned char oemfruformat;
2664 struct atk_fru *patkfru;
2665 union oemfru *poemfru;
2666
2667 /* Reset everything except PCI configuration space */
2668 slic_soft_reset(adapter);
2669
2670 /* Download the microcode */
2671 status = slic_card_download(adapter);
2672 if (status)
2673 return status;
2674
2675 if (!card->config_set) {
2676 peeprom = pci_alloc_consistent(adapter->pcidev,
2677 sizeof(struct slic_eeprom),
2678 &phys_config);
2679
2680 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2681 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2682
2683 if (!peeprom) {
2684 dev_err(&adapter->pcidev->dev,
2685 "Failed to allocate DMA memory for EEPROM.\n");
2686 return -ENOMEM;
2687 }
2688
2689 memset(peeprom, 0, sizeof(struct slic_eeprom));
2690
2691 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2692 mdelay(1);
2693 pshmem = (struct slic_shmem *)(unsigned long)
2694 adapter->phys_shmem;
2695
2696 spin_lock_irqsave(&adapter->bit64reglock.lock,
2697 adapter->bit64reglock.flags);
2698 slic_reg32_write(&slic_regs->slic_addr_upper,
2699 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2700 slic_reg32_write(&slic_regs->slic_isp,
2701 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2702 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2703 adapter->bit64reglock.flags);
2704
2705 status = slic_config_get(adapter, phys_configl, phys_configh);
2706 if (status) {
2707 dev_err(&adapter->pcidev->dev,
2708 "Failed to fetch config data from device.\n");
2709 goto card_init_err;
2710 }
2711
2712 for (;;) {
2713 if (adapter->pshmem->isr) {
2714 if (adapter->pshmem->isr & ISR_UPC) {
2715 adapter->pshmem->isr = 0;
2716 slic_reg64_write(adapter,
2717 &slic_regs->slic_isp, 0,
2718 &slic_regs->slic_addr_upper,
2719 0, FLUSH);
2720 slic_reg32_write(&slic_regs->slic_isr,
2721 0, FLUSH);
2722
2723 slic_upr_request_complete(adapter, 0);
2724 break;
2725 }
2726
2727 adapter->pshmem->isr = 0;
2728 slic_reg32_write(&slic_regs->slic_isr,
2729 0, FLUSH);
2730 } else {
2731 mdelay(1);
2732 i++;
2733 if (i > 5000) {
2734 dev_err(&adapter->pcidev->dev,
2735 "Fetch of config data timed out.\n");
2736 slic_reg64_write(adapter,
2737 &slic_regs->slic_isp, 0,
2738 &slic_regs->slic_addr_upper,
2739 0, FLUSH);
2740 status = -EINVAL;
2741 goto card_init_err;
2742 }
2743 }
2744 }
2745
2746 switch (adapter->devid) {
2747 /* Oasis card */
2748 case SLIC_2GB_DEVICE_ID:
2749 /* extract EEPROM data and pointers to EEPROM data */
2750 pOeeprom = (struct oslic_eeprom *) peeprom;
2751 eecodesize = pOeeprom->EecodeSize;
2752 dramsize = pOeeprom->DramSize;
2753 pmac = pOeeprom->MacInfo;
2754 fruformat = pOeeprom->FruFormat;
2755 patkfru = &pOeeprom->AtkFru;
2756 oemfruformat = pOeeprom->OemFruFormat;
2757 poemfru = &pOeeprom->OemFru;
2758 macaddrs = 2;
2759 /* Minor kludge for Oasis card
2760 get 2 MAC addresses from the
2761 EEPROM to ensure that function 1
2762 gets the Port 1 MAC address */
2763 break;
2764 default:
2765 /* extract EEPROM data and pointers to EEPROM data */
2766 eecodesize = peeprom->EecodeSize;
2767 dramsize = peeprom->DramSize;
2768 pmac = peeprom->u2.mac.MacInfo;
2769 fruformat = peeprom->FruFormat;
2770 patkfru = &peeprom->AtkFru;
2771 oemfruformat = peeprom->OemFruFormat;
2772 poemfru = &peeprom->OemFru;
2773 break;
2774 }
2775
2776 card->config.EepromValid = false;
2777
2778 /* see if the EEPROM is valid by checking it's checksum */
2779 if ((eecodesize <= MAX_EECODE_SIZE) &&
2780 (eecodesize >= MIN_EECODE_SIZE)) {
2781
2782 ee_chksum =
2783 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2784 /*
2785 calculate the EEPROM checksum
2786 */
2787 calc_chksum = slic_eeprom_cksum(peeprom,
2788 eecodesize - 2);
2789 /*
2790 if the ucdoe chksum flag bit worked,
2791 we wouldn't need this
2792 */
2793 if (ee_chksum == calc_chksum)
2794 card->config.EepromValid = true;
2795 }
2796 /* copy in the DRAM size */
2797 card->config.DramSize = dramsize;
2798
2799 /* copy in the MAC address(es) */
2800 for (i = 0; i < macaddrs; i++) {
2801 memcpy(&card->config.MacInfo[i],
2802 &pmac[i], sizeof(struct slic_config_mac));
2803 }
2804
2805 /* copy the Alacritech FRU information */
2806 card->config.FruFormat = fruformat;
2807 memcpy(&card->config.AtkFru, patkfru,
2808 sizeof(struct atk_fru));
2809
2810 pci_free_consistent(adapter->pcidev,
2811 sizeof(struct slic_eeprom),
2812 peeprom, phys_config);
2813
2814 if (!card->config.EepromValid) {
2815 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2816 &slic_regs->slic_addr_upper,
2817 0, FLUSH);
2818 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2819 return -EINVAL;
2820 }
2821
2822 card->config_set = 1;
2823 }
2824
2825 status = slic_card_download_gbrcv(adapter);
2826 if (status)
2827 return status;
2828
2829 if (slic_global.dynamic_intagg)
2830 slic_intagg_set(adapter, 0);
2831 else
2832 slic_intagg_set(adapter, intagg_delay);
2833
2834 /*
2835 * Initialize ping status to "ok"
2836 */
2837 card->pingstatus = ISR_PINGMASK;
2838
2839 /*
2840 * Lastly, mark our card state as up and return success
2841 */
2842 card->state = CARD_UP;
2843 card->reset_in_progress = 0;
2844
2845 return 0;
2846
2847 card_init_err:
2848 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2849 peeprom, phys_config);
2850 return status;
2851 }
2852
slic_init_driver(void)2853 static void slic_init_driver(void)
2854 {
2855 if (slic_first_init) {
2856 slic_first_init = 0;
2857 spin_lock_init(&slic_global.driver_lock.lock);
2858 }
2859 }
2860
slic_init_adapter(struct net_device * netdev,struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry,void __iomem * memaddr,int chip_idx)2861 static void slic_init_adapter(struct net_device *netdev,
2862 struct pci_dev *pcidev,
2863 const struct pci_device_id *pci_tbl_entry,
2864 void __iomem *memaddr, int chip_idx)
2865 {
2866 ushort index;
2867 struct slic_handle *pslic_handle;
2868 struct adapter *adapter = netdev_priv(netdev);
2869
2870 /* adapter->pcidev = pcidev;*/
2871 adapter->vendid = pci_tbl_entry->vendor;
2872 adapter->devid = pci_tbl_entry->device;
2873 adapter->subsysid = pci_tbl_entry->subdevice;
2874 adapter->busnumber = pcidev->bus->number;
2875 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2876 adapter->functionnumber = (pcidev->devfn & 0x7);
2877 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
2878 adapter->irq = pcidev->irq;
2879 /* adapter->netdev = netdev;*/
2880 adapter->chipid = chip_idx;
2881 adapter->port = 0; /*adapter->functionnumber;*/
2882 adapter->cardindex = adapter->port;
2883 spin_lock_init(&adapter->upr_lock.lock);
2884 spin_lock_init(&adapter->bit64reglock.lock);
2885 spin_lock_init(&adapter->adapter_lock.lock);
2886 spin_lock_init(&adapter->reset_lock.lock);
2887 spin_lock_init(&adapter->handle_lock.lock);
2888
2889 adapter->card_size = 1;
2890 /*
2891 Initialize slic_handle array
2892 */
2893 /*
2894 Start with 1. 0 is an invalid host handle.
2895 */
2896 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2897 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2898
2899 pslic_handle->token.handle_index = index;
2900 pslic_handle->type = SLIC_HANDLE_FREE;
2901 pslic_handle->next = adapter->pfree_slic_handles;
2902 adapter->pfree_slic_handles = pslic_handle;
2903 }
2904 adapter->pshmem = (struct slic_shmem *)
2905 pci_alloc_consistent(adapter->pcidev,
2906 sizeof(struct slic_shmem),
2907 &adapter->
2908 phys_shmem);
2909 if (adapter->pshmem)
2910 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
2911 }
2912
2913 static const struct net_device_ops slic_netdev_ops = {
2914 .ndo_open = slic_entry_open,
2915 .ndo_stop = slic_entry_halt,
2916 .ndo_start_xmit = slic_xmit_start,
2917 .ndo_do_ioctl = slic_ioctl,
2918 .ndo_set_mac_address = slic_mac_set_address,
2919 .ndo_get_stats = slic_get_stats,
2920 .ndo_set_rx_mode = slic_mcast_set_list,
2921 .ndo_validate_addr = eth_validate_addr,
2922 .ndo_change_mtu = eth_change_mtu,
2923 };
2924
slic_card_locate(struct adapter * adapter)2925 static u32 slic_card_locate(struct adapter *adapter)
2926 {
2927 struct sliccard *card = slic_global.slic_card;
2928 struct physcard *physcard = slic_global.phys_card;
2929 ushort card_hostid;
2930 u16 __iomem *hostid_reg;
2931 uint i;
2932 uint rdhostid_offset = 0;
2933
2934 switch (adapter->devid) {
2935 case SLIC_2GB_DEVICE_ID:
2936 rdhostid_offset = SLIC_RDHOSTID_2GB;
2937 break;
2938 case SLIC_1GB_DEVICE_ID:
2939 rdhostid_offset = SLIC_RDHOSTID_1GB;
2940 break;
2941 default:
2942 return -ENODEV;
2943 }
2944
2945 hostid_reg =
2946 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2947 rdhostid_offset);
2948
2949 /* read the 16 bit hostid from SRAM */
2950 card_hostid = (ushort) readw(hostid_reg);
2951
2952 /* Initialize a new card structure if need be */
2953 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2954 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2955 if (card == NULL)
2956 return -ENOMEM;
2957
2958 card->next = slic_global.slic_card;
2959 slic_global.slic_card = card;
2960 card->busnumber = adapter->busnumber;
2961 card->slotnumber = adapter->slotnumber;
2962
2963 /* Find an available cardnum */
2964 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2965 if (slic_global.cardnuminuse[i] == 0) {
2966 slic_global.cardnuminuse[i] = 1;
2967 card->cardnum = i;
2968 break;
2969 }
2970 }
2971 slic_global.num_slic_cards++;
2972 } else {
2973 /* Card exists, find the card this adapter belongs to */
2974 while (card) {
2975 if (card->cardnum == card_hostid)
2976 break;
2977 card = card->next;
2978 }
2979 }
2980
2981 if (!card)
2982 return -ENXIO;
2983 /* Put the adapter in the card's adapter list */
2984 if (!card->adapter[adapter->port]) {
2985 card->adapter[adapter->port] = adapter;
2986 adapter->card = card;
2987 }
2988
2989 card->card_size = 1; /* one port per *logical* card */
2990
2991 while (physcard) {
2992 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2993 if (physcard->adapter[i])
2994 break;
2995 }
2996 if (i == SLIC_MAX_PORTS)
2997 break;
2998
2999 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3000 break;
3001 physcard = physcard->next;
3002 }
3003 if (!physcard) {
3004 /* no structure allocated for this physical card yet */
3005 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3006 if (!physcard) {
3007 if (card_hostid == SLIC_HOSTID_DEFAULT)
3008 kfree(card);
3009 return -ENOMEM;
3010 }
3011
3012 physcard->next = slic_global.phys_card;
3013 slic_global.phys_card = physcard;
3014 physcard->adapters_allocd = 1;
3015 } else {
3016 physcard->adapters_allocd++;
3017 }
3018 /* Note - this is ZERO relative */
3019 adapter->physport = physcard->adapters_allocd - 1;
3020
3021 physcard->adapter[adapter->physport] = adapter;
3022 adapter->physcard = physcard;
3023
3024 return 0;
3025 }
3026
slic_entry_probe(struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry)3027 static int slic_entry_probe(struct pci_dev *pcidev,
3028 const struct pci_device_id *pci_tbl_entry)
3029 {
3030 static int cards_found;
3031 static int did_version;
3032 int err = -ENODEV;
3033 struct net_device *netdev;
3034 struct adapter *adapter;
3035 void __iomem *memmapped_ioaddr = NULL;
3036 ulong mmio_start = 0;
3037 ulong mmio_len = 0;
3038 struct sliccard *card = NULL;
3039 int pci_using_dac = 0;
3040
3041 slic_global.dynamic_intagg = dynamic_intagg;
3042
3043 err = pci_enable_device(pcidev);
3044
3045 if (err)
3046 return err;
3047
3048 if (did_version++ == 0) {
3049 dev_info(&pcidev->dev, "%s\n", slic_banner);
3050 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
3051 }
3052
3053 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3054 pci_using_dac = 1;
3055 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3056 if (err) {
3057 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3058 goto err_out_disable_pci;
3059 }
3060 } else {
3061 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3062 if (err) {
3063 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3064 goto err_out_disable_pci;
3065 }
3066 pci_using_dac = 0;
3067 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3068 }
3069
3070 err = pci_request_regions(pcidev, DRV_NAME);
3071 if (err) {
3072 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3073 goto err_out_disable_pci;
3074 }
3075
3076 pci_set_master(pcidev);
3077
3078 netdev = alloc_etherdev(sizeof(struct adapter));
3079 if (!netdev) {
3080 err = -ENOMEM;
3081 goto err_out_exit_slic_probe;
3082 }
3083
3084 SET_NETDEV_DEV(netdev, &pcidev->dev);
3085
3086 pci_set_drvdata(pcidev, netdev);
3087 adapter = netdev_priv(netdev);
3088 adapter->netdev = netdev;
3089 adapter->pcidev = pcidev;
3090 if (pci_using_dac)
3091 netdev->features |= NETIF_F_HIGHDMA;
3092
3093 mmio_start = pci_resource_start(pcidev, 0);
3094 mmio_len = pci_resource_len(pcidev, 0);
3095
3096
3097 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3098 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3099 if (!memmapped_ioaddr) {
3100 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3101 mmio_len, mmio_start);
3102 err = -ENOMEM;
3103 goto err_out_free_netdev;
3104 }
3105
3106 slic_config_pci(pcidev);
3107
3108 slic_init_driver();
3109
3110 slic_init_adapter(netdev,
3111 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3112
3113 err = slic_card_locate(adapter);
3114 if (err) {
3115 dev_err(&pcidev->dev, "cannot locate card\n");
3116 goto err_out_unmap;
3117 }
3118
3119 card = adapter->card;
3120
3121 if (!adapter->allocated) {
3122 card->adapters_allocated++;
3123 adapter->allocated = 1;
3124 }
3125
3126 err = slic_card_init(card, adapter);
3127 if (err)
3128 goto err_out_unmap;
3129
3130 slic_adapter_set_hwaddr(adapter);
3131
3132 netdev->base_addr = (unsigned long) memmapped_ioaddr;
3133 netdev->irq = adapter->irq;
3134 netdev->netdev_ops = &slic_netdev_ops;
3135
3136 strcpy(netdev->name, "eth%d");
3137 err = register_netdev(netdev);
3138 if (err) {
3139 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3140 goto err_out_unmap;
3141 }
3142
3143 cards_found++;
3144
3145 return 0;
3146
3147 err_out_unmap:
3148 iounmap(memmapped_ioaddr);
3149 err_out_free_netdev:
3150 free_netdev(netdev);
3151 err_out_exit_slic_probe:
3152 pci_release_regions(pcidev);
3153 err_out_disable_pci:
3154 pci_disable_device(pcidev);
3155 return err;
3156 }
3157
3158 static struct pci_driver slic_driver = {
3159 .name = DRV_NAME,
3160 .id_table = slic_pci_tbl,
3161 .probe = slic_entry_probe,
3162 .remove = slic_entry_remove,
3163 };
3164
slic_module_init(void)3165 static int __init slic_module_init(void)
3166 {
3167 slic_init_driver();
3168
3169 return pci_register_driver(&slic_driver);
3170 }
3171
slic_module_cleanup(void)3172 static void __exit slic_module_cleanup(void)
3173 {
3174 pci_unregister_driver(&slic_driver);
3175 }
3176
3177 module_init(slic_module_init);
3178 module_exit(slic_module_cleanup);
3179