1 /*
2  * drivers/media/platform/samsung/mfc5/s5p_mfc_opr_v5.h
3  *
4  * Header file for Samsung MFC (Multi Function Codec - FIMV) driver
5  * Contains declarations of hw related functions.
6  *
7  * Kamil Debski, Copyright (C) 2011 Samsung Electronics
8  * http://www.samsung.com/
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #ifndef S5P_MFC_OPR_V5_H_
16 #define S5P_MFC_OPR_V5_H_
17 
18 #include "s5p_mfc_common.h"
19 #include "s5p_mfc_opr.h"
20 
21 enum MFC_SHM_OFS {
22 	EXTENEDED_DECODE_STATUS	= 0x00,	/* D */
23 	SET_FRAME_TAG		= 0x04, /* D */
24 	GET_FRAME_TAG_TOP	= 0x08, /* D */
25 	GET_FRAME_TAG_BOT	= 0x0C, /* D */
26 	PIC_TIME_TOP		= 0x10, /* D */
27 	PIC_TIME_BOT		= 0x14, /* D */
28 	START_BYTE_NUM		= 0x18, /* D */
29 
30 	CROP_INFO_H		= 0x20, /* D */
31 	CROP_INFO_V		= 0x24, /* D */
32 	EXT_ENC_CONTROL		= 0x28,	/* E */
33 	ENC_PARAM_CHANGE	= 0x2C,	/* E */
34 	RC_VOP_TIMING		= 0x30,	/* E, MPEG4 */
35 	HEC_PERIOD		= 0x34,	/* E, MPEG4 */
36 	METADATA_ENABLE		= 0x38, /* C */
37 	METADATA_STATUS		= 0x3C, /* C */
38 	METADATA_DISPLAY_INDEX	= 0x40,	/* C */
39 	EXT_METADATA_START_ADDR	= 0x44, /* C */
40 	PUT_EXTRADATA		= 0x48, /* C */
41 	EXTRADATA_ADDR		= 0x4C, /* C */
42 
43 	ALLOC_LUMA_DPB_SIZE	= 0x64,	/* D */
44 	ALLOC_CHROMA_DPB_SIZE	= 0x68,	/* D */
45 	ALLOC_MV_SIZE		= 0x6C,	/* D */
46 	P_B_FRAME_QP		= 0x70,	/* E */
47 	SAMPLE_ASPECT_RATIO_IDC	= 0x74, /* E, H.264, depend on
48 				ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */
49 	EXTENDED_SAR		= 0x78, /* E, H.264, depned on
50 				ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */
51 	DISP_PIC_PROFILE	= 0x7C, /* D */
52 	FLUSH_CMD_TYPE		= 0x80, /* C */
53 	FLUSH_CMD_INBUF1	= 0x84, /* C */
54 	FLUSH_CMD_INBUF2	= 0x88, /* C */
55 	FLUSH_CMD_OUTBUF	= 0x8C, /* E */
56 	NEW_RC_BIT_RATE		= 0x90, /* E, format as RC_BIT_RATE(0xC5A8)
57 			depend on RC_BIT_RATE_CHANGE in ENC_PARAM_CHANGE */
58 	NEW_RC_FRAME_RATE	= 0x94, /* E, format as RC_FRAME_RATE(0xD0D0)
59 			depend on RC_FRAME_RATE_CHANGE in ENC_PARAM_CHANGE */
60 	NEW_I_PERIOD		= 0x98, /* E, format as I_FRM_CTRL(0xC504)
61 			depend on I_PERIOD_CHANGE in ENC_PARAM_CHANGE */
62 	H264_I_PERIOD		= 0x9C, /* E, H.264, open GOP */
63 	RC_CONTROL_CONFIG	= 0xA0, /* E */
64 	BATCH_INPUT_ADDR	= 0xA4, /* E */
65 	BATCH_OUTPUT_ADDR	= 0xA8, /* E */
66 	BATCH_OUTPUT_SIZE	= 0xAC, /* E */
67 	MIN_LUMA_DPB_SIZE	= 0xB0, /* D */
68 	DEVICE_FORMAT_ID	= 0xB4, /* C */
69 	H264_POC_TYPE		= 0xB8, /* D */
70 	MIN_CHROMA_DPB_SIZE	= 0xBC, /* D */
71 	DISP_PIC_FRAME_TYPE	= 0xC0, /* D */
72 	FREE_LUMA_DPB		= 0xC4, /* D, VC1 MPEG4 */
73 	ASPECT_RATIO_INFO	= 0xC8, /* D, MPEG4 */
74 	EXTENDED_PAR		= 0xCC, /* D, MPEG4 */
75 	DBG_HISTORY_INPUT0	= 0xD0, /* C */
76 	DBG_HISTORY_INPUT1	= 0xD4,	/* C */
77 	DBG_HISTORY_OUTPUT	= 0xD8,	/* C */
78 	HIERARCHICAL_P_QP	= 0xE0, /* E, H.264 */
79 	FRAME_PACK_SEI_ENABLE	= 0x168, /* C */
80 	FRAME_PACK_SEI_AVAIL	= 0x16c, /* D */
81 	FRAME_PACK_SEI_INFO	= 0x17c, /* E */
82 };
83 
84 struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v5(void);
85 #endif /* S5P_MFC_OPR_H_ */
86