1 /*
2  * Copyright (C) ST-Ericsson SA 2010
3  *
4  * License Terms: GNU General Public License v2
5  *
6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
9  */
10 
11 #ifndef __LINUX_MFD_AB8500_REGULATOR_H
12 #define __LINUX_MFD_AB8500_REGULATOR_H
13 
14 #include <linux/platform_device.h>
15 
16 /* AB8500 regulators */
17 enum ab8500_regulator_id {
18 	AB8500_LDO_AUX1,
19 	AB8500_LDO_AUX2,
20 	AB8500_LDO_AUX3,
21 	AB8500_LDO_INTCORE,
22 	AB8500_LDO_TVOUT,
23 	AB8500_LDO_AUDIO,
24 	AB8500_LDO_ANAMIC1,
25 	AB8500_LDO_ANAMIC2,
26 	AB8500_LDO_DMIC,
27 	AB8500_LDO_ANA,
28 	AB8500_NUM_REGULATORS,
29 };
30 
31 /* AB8505 regulators */
32 enum ab8505_regulator_id {
33 	AB8505_LDO_AUX1,
34 	AB8505_LDO_AUX2,
35 	AB8505_LDO_AUX3,
36 	AB8505_LDO_AUX4,
37 	AB8505_LDO_AUX5,
38 	AB8505_LDO_AUX6,
39 	AB8505_LDO_INTCORE,
40 	AB8505_LDO_ADC,
41 	AB8505_LDO_USB,
42 	AB8505_LDO_AUDIO,
43 	AB8505_LDO_ANAMIC1,
44 	AB8505_LDO_ANAMIC2,
45 	AB8505_LDO_AUX8,
46 	AB8505_LDO_ANA,
47 	AB8505_SYSCLKREQ_2,
48 	AB8505_SYSCLKREQ_4,
49 	AB8505_NUM_REGULATORS,
50 };
51 
52 /* AB9540 regulators */
53 enum ab9540_regulator_id {
54 	AB9540_LDO_AUX1,
55 	AB9540_LDO_AUX2,
56 	AB9540_LDO_AUX3,
57 	AB9540_LDO_AUX4,
58 	AB9540_LDO_INTCORE,
59 	AB9540_LDO_TVOUT,
60 	AB9540_LDO_USB,
61 	AB9540_LDO_AUDIO,
62 	AB9540_LDO_ANAMIC1,
63 	AB9540_LDO_ANAMIC2,
64 	AB9540_LDO_DMIC,
65 	AB9540_LDO_ANA,
66 	AB9540_SYSCLKREQ_2,
67 	AB9540_SYSCLKREQ_4,
68 	AB9540_NUM_REGULATORS,
69 };
70 
71 /* AB8540 regulators */
72 enum ab8540_regulator_id {
73 	AB8540_LDO_AUX1,
74 	AB8540_LDO_AUX2,
75 	AB8540_LDO_AUX3,
76 	AB8540_LDO_AUX4,
77 	AB8540_LDO_AUX5,
78 	AB8540_LDO_AUX6,
79 	AB8540_LDO_INTCORE,
80 	AB8540_LDO_TVOUT,
81 	AB8540_LDO_AUDIO,
82 	AB8540_LDO_ANAMIC1,
83 	AB8540_LDO_ANAMIC2,
84 	AB8540_LDO_DMIC,
85 	AB8540_LDO_ANA,
86 	AB8540_LDO_SDIO,
87 	AB8540_SYSCLKREQ_2,
88 	AB8540_SYSCLKREQ_4,
89 	AB8540_NUM_REGULATORS,
90 };
91 
92 /* AB8500, AB8505, and AB9540 register initialization */
93 struct ab8500_regulator_reg_init {
94 	int id;
95 	u8 mask;
96 	u8 value;
97 };
98 
99 #define INIT_REGULATOR_REGISTER(_id, _mask, _value)	\
100 	{						\
101 		.id = _id,				\
102 		.mask = _mask,				\
103 		.value = _value,			\
104 	}
105 
106 /* AB8500 registers */
107 enum ab8500_regulator_reg {
108 	AB8500_REGUREQUESTCTRL2,
109 	AB8500_REGUREQUESTCTRL3,
110 	AB8500_REGUREQUESTCTRL4,
111 	AB8500_REGUSYSCLKREQ1HPVALID1,
112 	AB8500_REGUSYSCLKREQ1HPVALID2,
113 	AB8500_REGUHWHPREQ1VALID1,
114 	AB8500_REGUHWHPREQ1VALID2,
115 	AB8500_REGUHWHPREQ2VALID1,
116 	AB8500_REGUHWHPREQ2VALID2,
117 	AB8500_REGUSWHPREQVALID1,
118 	AB8500_REGUSWHPREQVALID2,
119 	AB8500_REGUSYSCLKREQVALID1,
120 	AB8500_REGUSYSCLKREQVALID2,
121 	AB8500_REGUMISC1,
122 	AB8500_VAUDIOSUPPLY,
123 	AB8500_REGUCTRL1VAMIC,
124 	AB8500_VPLLVANAREGU,
125 	AB8500_VREFDDR,
126 	AB8500_EXTSUPPLYREGU,
127 	AB8500_VAUX12REGU,
128 	AB8500_VRF1VAUX3REGU,
129 	AB8500_VAUX1SEL,
130 	AB8500_VAUX2SEL,
131 	AB8500_VRF1VAUX3SEL,
132 	AB8500_REGUCTRL2SPARE,
133 	AB8500_REGUCTRLDISCH,
134 	AB8500_REGUCTRLDISCH2,
135 	AB8500_NUM_REGULATOR_REGISTERS,
136 };
137 
138 /* AB8505 registers */
139 enum ab8505_regulator_reg {
140 	AB8505_REGUREQUESTCTRL1,
141 	AB8505_REGUREQUESTCTRL2,
142 	AB8505_REGUREQUESTCTRL3,
143 	AB8505_REGUREQUESTCTRL4,
144 	AB8505_REGUSYSCLKREQ1HPVALID1,
145 	AB8505_REGUSYSCLKREQ1HPVALID2,
146 	AB8505_REGUHWHPREQ1VALID1,
147 	AB8505_REGUHWHPREQ1VALID2,
148 	AB8505_REGUHWHPREQ2VALID1,
149 	AB8505_REGUHWHPREQ2VALID2,
150 	AB8505_REGUSWHPREQVALID1,
151 	AB8505_REGUSWHPREQVALID2,
152 	AB8505_REGUSYSCLKREQVALID1,
153 	AB8505_REGUSYSCLKREQVALID2,
154 	AB8505_REGUVAUX4REQVALID,
155 	AB8505_REGUMISC1,
156 	AB8505_VAUDIOSUPPLY,
157 	AB8505_REGUCTRL1VAMIC,
158 	AB8505_VSMPSAREGU,
159 	AB8505_VSMPSBREGU,
160 	AB8505_VSAFEREGU, /* NOTE! PRCMU register */
161 	AB8505_VPLLVANAREGU,
162 	AB8505_EXTSUPPLYREGU,
163 	AB8505_VAUX12REGU,
164 	AB8505_VRF1VAUX3REGU,
165 	AB8505_VSMPSASEL1,
166 	AB8505_VSMPSASEL2,
167 	AB8505_VSMPSASEL3,
168 	AB8505_VSMPSBSEL1,
169 	AB8505_VSMPSBSEL2,
170 	AB8505_VSMPSBSEL3,
171 	AB8505_VSAFESEL1, /* NOTE! PRCMU register */
172 	AB8505_VSAFESEL2, /* NOTE! PRCMU register */
173 	AB8505_VSAFESEL3, /* NOTE! PRCMU register */
174 	AB8505_VAUX1SEL,
175 	AB8505_VAUX2SEL,
176 	AB8505_VRF1VAUX3SEL,
177 	AB8505_VAUX4REQCTRL,
178 	AB8505_VAUX4REGU,
179 	AB8505_VAUX4SEL,
180 	AB8505_REGUCTRLDISCH,
181 	AB8505_REGUCTRLDISCH2,
182 	AB8505_REGUCTRLDISCH3,
183 	AB8505_CTRLVAUX5,
184 	AB8505_CTRLVAUX6,
185 	AB8505_NUM_REGULATOR_REGISTERS,
186 };
187 
188 /* AB9540 registers */
189 enum ab9540_regulator_reg {
190 	AB9540_REGUREQUESTCTRL1,
191 	AB9540_REGUREQUESTCTRL2,
192 	AB9540_REGUREQUESTCTRL3,
193 	AB9540_REGUREQUESTCTRL4,
194 	AB9540_REGUSYSCLKREQ1HPVALID1,
195 	AB9540_REGUSYSCLKREQ1HPVALID2,
196 	AB9540_REGUHWHPREQ1VALID1,
197 	AB9540_REGUHWHPREQ1VALID2,
198 	AB9540_REGUHWHPREQ2VALID1,
199 	AB9540_REGUHWHPREQ2VALID2,
200 	AB9540_REGUSWHPREQVALID1,
201 	AB9540_REGUSWHPREQVALID2,
202 	AB9540_REGUSYSCLKREQVALID1,
203 	AB9540_REGUSYSCLKREQVALID2,
204 	AB9540_REGUVAUX4REQVALID,
205 	AB9540_REGUMISC1,
206 	AB9540_VAUDIOSUPPLY,
207 	AB9540_REGUCTRL1VAMIC,
208 	AB9540_VSMPS1REGU,
209 	AB9540_VSMPS2REGU,
210 	AB9540_VSMPS3REGU, /* NOTE! PRCMU register */
211 	AB9540_VPLLVANAREGU,
212 	AB9540_EXTSUPPLYREGU,
213 	AB9540_VAUX12REGU,
214 	AB9540_VRF1VAUX3REGU,
215 	AB9540_VSMPS1SEL1,
216 	AB9540_VSMPS1SEL2,
217 	AB9540_VSMPS1SEL3,
218 	AB9540_VSMPS2SEL1,
219 	AB9540_VSMPS2SEL2,
220 	AB9540_VSMPS2SEL3,
221 	AB9540_VSMPS3SEL1, /* NOTE! PRCMU register */
222 	AB9540_VSMPS3SEL2, /* NOTE! PRCMU register */
223 	AB9540_VAUX1SEL,
224 	AB9540_VAUX2SEL,
225 	AB9540_VRF1VAUX3SEL,
226 	AB9540_REGUCTRL2SPARE,
227 	AB9540_VAUX4REQCTRL,
228 	AB9540_VAUX4REGU,
229 	AB9540_VAUX4SEL,
230 	AB9540_REGUCTRLDISCH,
231 	AB9540_REGUCTRLDISCH2,
232 	AB9540_REGUCTRLDISCH3,
233 	AB9540_NUM_REGULATOR_REGISTERS,
234 };
235 
236 /* AB8540 registers */
237 enum ab8540_regulator_reg {
238 	AB8540_REGUREQUESTCTRL1,
239 	AB8540_REGUREQUESTCTRL2,
240 	AB8540_REGUREQUESTCTRL3,
241 	AB8540_REGUREQUESTCTRL4,
242 	AB8540_REGUSYSCLKREQ1HPVALID1,
243 	AB8540_REGUSYSCLKREQ1HPVALID2,
244 	AB8540_REGUHWHPREQ1VALID1,
245 	AB8540_REGUHWHPREQ1VALID2,
246 	AB8540_REGUHWHPREQ2VALID1,
247 	AB8540_REGUHWHPREQ2VALID2,
248 	AB8540_REGUSWHPREQVALID1,
249 	AB8540_REGUSWHPREQVALID2,
250 	AB8540_REGUSYSCLKREQVALID1,
251 	AB8540_REGUSYSCLKREQVALID2,
252 	AB8540_REGUVAUX4REQVALID,
253 	AB8540_REGUVAUX5REQVALID,
254 	AB8540_REGUVAUX6REQVALID,
255 	AB8540_REGUVCLKBREQVALID,
256 	AB8540_REGUVRF1REQVALID,
257 	AB8540_REGUMISC1,
258 	AB8540_VAUDIOSUPPLY,
259 	AB8540_REGUCTRL1VAMIC,
260 	AB8540_VHSIC,
261 	AB8540_VSDIO,
262 	AB8540_VSMPS1REGU,
263 	AB8540_VSMPS2REGU,
264 	AB8540_VSMPS3REGU,
265 	AB8540_VPLLVANAREGU,
266 	AB8540_EXTSUPPLYREGU,
267 	AB8540_VAUX12REGU,
268 	AB8540_VRF1VAUX3REGU,
269 	AB8540_VSMPS1SEL1,
270 	AB8540_VSMPS1SEL2,
271 	AB8540_VSMPS1SEL3,
272 	AB8540_VSMPS2SEL1,
273 	AB8540_VSMPS2SEL2,
274 	AB8540_VSMPS2SEL3,
275 	AB8540_VSMPS3SEL1,
276 	AB8540_VSMPS3SEL2,
277 	AB8540_VAUX1SEL,
278 	AB8540_VAUX2SEL,
279 	AB8540_VRF1VAUX3SEL,
280 	AB8540_REGUCTRL2SPARE,
281 	AB8540_VAUX4REQCTRL,
282 	AB8540_VAUX4REGU,
283 	AB8540_VAUX4SEL,
284 	AB8540_VAUX5REQCTRL,
285 	AB8540_VAUX5REGU,
286 	AB8540_VAUX5SEL,
287 	AB8540_VAUX6REQCTRL,
288 	AB8540_VAUX6REGU,
289 	AB8540_VAUX6SEL,
290 	AB8540_VCLKBREQCTRL,
291 	AB8540_VCLKBREGU,
292 	AB8540_VCLKBSEL,
293 	AB8540_VRF1REQCTRL,
294 	AB8540_REGUCTRLDISCH,
295 	AB8540_REGUCTRLDISCH2,
296 	AB8540_REGUCTRLDISCH3,
297 	AB8540_REGUCTRLDISCH4,
298 	AB8540_VSIMSYSCLKCTRL,
299 	AB8540_VANAVPLLSEL,
300 	AB8540_NUM_REGULATOR_REGISTERS,
301 };
302 
303 /* AB8500 external regulators */
304 struct ab8500_ext_regulator_cfg {
305 	bool hwreq; /* requires hw mode or high power mode */
306 };
307 
308 enum ab8500_ext_regulator_id {
309 	AB8500_EXT_SUPPLY1,
310 	AB8500_EXT_SUPPLY2,
311 	AB8500_EXT_SUPPLY3,
312 	AB8500_NUM_EXT_REGULATORS,
313 };
314 
315 /* AB8500 regulator platform data */
316 struct ab8500_regulator_platform_data {
317 	int num_reg_init;
318 	struct ab8500_regulator_reg_init *reg_init;
319 	int num_regulator;
320 	struct regulator_init_data *regulator;
321 	int num_ext_regulator;
322 	struct regulator_init_data *ext_regulator;
323 };
324 
325 #endif
326