1 /*
2 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #ifndef _ASM_X86_AMD_IOMMU_H
21 #define _ASM_X86_AMD_IOMMU_H
22
23 #include <linux/types.h>
24
25 #ifdef CONFIG_AMD_IOMMU
26
27 struct task_struct;
28 struct pci_dev;
29
30 extern int amd_iommu_detect(void);
31 extern int amd_iommu_init_hardware(void);
32
33 /**
34 * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
35 * in the IOMMUv2 driver
36 * @pdev: The PCI device the workaround is necessary for
37 * @erratum: The erratum workaround to enable
38 *
39 * The function needs to be called before amd_iommu_init_device().
40 * Possible values for the erratum number are for now:
41 * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
42 * is enabled
43 * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
44 * requests to one
45 */
46 #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
47 #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
48
49 extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
50
51 /**
52 * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
53 * @pdev: The PCI device to initialize
54 * @pasids: Number of PASIDs to support for this device
55 *
56 * This function does all setup for the device pdev so that it can be
57 * used with IOMMUv2.
58 * Returns 0 on success or negative value on error.
59 */
60 extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
61
62 /**
63 * amd_iommu_free_device() - Free all IOMMUv2 related device resources
64 * and disable IOMMUv2 usage for this device
65 * @pdev: The PCI device to disable IOMMUv2 usage for'
66 */
67 extern void amd_iommu_free_device(struct pci_dev *pdev);
68
69 /**
70 * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
71 * @pdev: The PCI device to bind the task to
72 * @pasid: The PASID on the device the task should be bound to
73 * @task: the task to bind
74 *
75 * The function returns 0 on success or a negative value on error.
76 */
77 extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
78 struct task_struct *task);
79
80 /**
81 * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
82 * a device
83 * @pdev: The device of the PASID
84 * @pasid: The PASID to unbind
85 *
86 * When this function returns the device is no longer using the PASID
87 * and the PASID is no longer bound to its task.
88 */
89 extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
90
91 /**
92 * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
93 * PRI requests
94 * @pdev: The PCI device the call-back should be registered for
95 * @cb: The call-back function
96 *
97 * The IOMMUv2 driver invokes this call-back when it is unable to
98 * successfully handle a PRI request. The device driver can then decide
99 * which PRI response the device should see. Possible return values for
100 * the call-back are:
101 *
102 * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
103 * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
104 * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
105 * the device is required to disable
106 * PRI when it receives this response
107 *
108 * The function returns 0 on success or negative value on error.
109 */
110 #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
111 #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
112 #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
113
114 typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
115 int pasid,
116 unsigned long address,
117 u16);
118
119 extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
120 amd_iommu_invalid_ppr_cb cb);
121
122 #define PPR_FAULT_EXEC (1 << 1)
123 #define PPR_FAULT_READ (1 << 2)
124 #define PPR_FAULT_WRITE (1 << 5)
125 #define PPR_FAULT_USER (1 << 6)
126 #define PPR_FAULT_RSVD (1 << 7)
127 #define PPR_FAULT_GN (1 << 8)
128
129 /**
130 * amd_iommu_device_info() - Get information about IOMMUv2 support of a
131 * PCI device
132 * @pdev: PCI device to query information from
133 * @info: A pointer to an amd_iommu_device_info structure which will contain
134 * the information about the PCI device
135 *
136 * Returns 0 on success, negative value on error
137 */
138
139 #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
140 #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
141 #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
142 #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
143 on memory pages */
144 #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
145 super-user privileges */
146
147 struct amd_iommu_device_info {
148 int max_pasids;
149 u32 flags;
150 };
151
152 extern int amd_iommu_device_info(struct pci_dev *pdev,
153 struct amd_iommu_device_info *info);
154
155 /**
156 * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
157 * a pasid context. This call-back is
158 * invoked when the IOMMUv2 driver needs to
159 * invalidate a PASID context, for example
160 * because the task that is bound to that
161 * context is about to exit.
162 *
163 * @pdev: The PCI device the call-back should be registered for
164 * @cb: The call-back function
165 */
166
167 typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
168
169 extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
170 amd_iommu_invalidate_ctx cb);
171
172 #else
173
amd_iommu_detect(void)174 static inline int amd_iommu_detect(void) { return -ENODEV; }
175
176 #endif
177
178 #endif /* _ASM_X86_AMD_IOMMU_H */
179